MMWCAS-RF-EVM: AWR2243的SPI功能引脚中MOSI为什么要下拉？

我需要咨询产品线工程师，再为您解答。

 Datasheet规格书中指的是管脚内部电阻是上拉的，板子上是指和外部器件的接法。具体请看下面工程师的回复。
I think you are referring to two different things. The DS talks about status of PULL structures associated with the IO after device POWER UP. Where as the Board schematic is talking about the external recommended interface. This signal is also going to the HOST.

“atasheet规格书中指的是管脚内部电阻是上拉的，板子上是指和外部器件的接法”，这个我清楚。

但是我的疑问是板子上的电阻为什么要接下拉？为什么要和芯片内部的上拉不一致？这个是什么原因？