通过FPGA配置ADS54J20的寄存器,SPI时序正常,sck频率1MHz,配置analog Bank的寄存器回读正常,配置JESD BANK时spi误会度信号
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通过FPGA配置ADS54J20的寄存器,SPI时序正常,sck频率1MHz,配置analog Bank的寄存器回读正常,配置JESD BANK时spi误会度信号
配置ADS54j20之前,先把ADC工作所需的时钟都配齐了,再配置ADC的寄存器