This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

c6748 串口打印错误

Other Parts Discussed in Thread: TMS320C6748

如图:串口打印乱码,但是每次打印的乱码一样。这个可能的错误有哪些,在启动时bootme打印正常

代码如下:

#define UART_STDIO_INSTANCE             (2)
#define UART_CONSOLE_BASE               (SOC_UART_2_REGS)

int main()
{
    // 串口终端初始化
    UARTStdioInit();

    // 启动信息
    UARTPuts("\r\n\r\nTronlong DSP TMS320C6748 NDK Application ......\r\n", -2);


    // 启动 SYS/BIOS 系统
    BIOS_start();
}

void UARTStdioInit(void)
{
    UARTConsoleInit();
}

void UARTConsoleInit(void)
{
     #if (0 == UART_STDIO_INSTANCE)
     {
          PSCModuleControl(SOC_PSC_0_REGS,9, 0, PSC_MDCTL_NEXT_ENABLE);
          UARTPinMuxSetup(0, FALSE);
     }
     
     #elif (1 == UART_STDIO_INSTANCE)
     {
          PSCModuleControl(SOC_PSC_1_REGS,12, 0, PSC_MDCTL_NEXT_ENABLE);
          UARTPinMuxSetup(1, FALSE);
     }

     #else
     {
          PSCModuleControl(SOC_PSC_1_REGS,13, 0, PSC_MDCTL_NEXT_ENABLE);
          UARTPinMuxSetup(2, FALSE);
     }
     #endif
     
     UARTStdioInitExpClk(BAUD_115200, UART_RX_TRIG_LEVEL_1);
}

void UARTPinMuxSetup(unsigned int instanceNum, unsigned int modemCtrlChoice)
{
    unsigned int svPinMuxRtsCts = 0;
    unsigned int svPinMuxTxdRxd = 0;

    if(0 == instanceNum)
    {
          if(TRUE == modemCtrlChoice)
          {
               svPinMuxRtsCts = (HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(3)) & \
                                 ~(SYSCFG_PINMUX3_PINMUX3_27_24 | \
                                   SYSCFG_PINMUX3_PINMUX3_31_28));

               HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(3)) = \
                    (PINMUX3_UART0_CTS_ENABLE | \
                     PINMUX3_UART0_RTS_ENABLE | \
                     svPinMuxRtsCts);
          }

          svPinMuxTxdRxd = (HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(3)) & \
                            ~(SYSCFG_PINMUX3_PINMUX3_23_20 | \
                              SYSCFG_PINMUX3_PINMUX3_19_16));
       
          HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(3)) = \
               (PINMUX3_UART0_TXD_ENABLE | \
                PINMUX3_UART0_RXD_ENABLE | \
                svPinMuxTxdRxd);
     }

     else if(1 == instanceNum)
     {
          if(TRUE == modemCtrlChoice)
          {
               svPinMuxRtsCts = (HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(0)) & \
                                 ~(SYSCFG_PINMUX0_PINMUX0_23_20 | \
                                   SYSCFG_PINMUX0_PINMUX0_19_16));

               HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(0)) = \
                    (PINMUX0_UART1_CTS_ENABLE | \
                     PINMUX0_UART1_RTS_ENABLE | \
                     svPinMuxRtsCts);
          }
        
          svPinMuxTxdRxd = (HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(4)) & \
                           ~(SYSCFG_PINMUX4_PINMUX4_31_28 | \
                             SYSCFG_PINMUX4_PINMUX4_27_24));

          HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(4)) = \
               (PINMUX4_UART1_TXD_ENABLE | \
                PINMUX4_UART1_RXD_ENABLE | \
                svPinMuxTxdRxd);
    }      
                       
     else if(2 == instanceNum)
     {

          if(TRUE == modemCtrlChoice)
          {
               svPinMuxRtsCts = (HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(0)) & \
                                 ~(SYSCFG_PINMUX0_PINMUX0_31_28 | \
                                   SYSCFG_PINMUX0_PINMUX0_27_24));

               HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(0)) = \
                    (PINMUX0_UART2_CTS_ENABLE | \
                     PINMUX0_UART2_RTS_ENABLE | \
                     svPinMuxRtsCts);
          }

          svPinMuxTxdRxd = (HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(4)) & \
                            ~(SYSCFG_PINMUX4_PINMUX4_23_20 | \
                              SYSCFG_PINMUX4_PINMUX4_19_16));

          HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(4)) = \
               (PINMUX4_UART2_TXD_ENABLE | \
                PINMUX4_UART2_RXD_ENABLE | \
                svPinMuxTxdRxd);
          
    }

    else
    {

    }
}

static void UARTStdioInitExpClk(unsigned int baudRate, unsigned int rxTrigLevel)
{
     // 使能接收 / 发送
     UARTEnable(UART_CONSOLE_BASE);

     // 串口参数配置
     // 8位数据位 1位停止位 无校验
     UARTConfigSetExpClk(UART_CONSOLE_BASE,
                         SOC_UART_2_MODULE_FREQ,
                         baudRate,
                         UART_WORDL_8BITS,
                         UART_OVER_SAMP_RATE_16);


     // 使能接收 / 发送 FIFO
     UARTFIFOEnable(UART_CONSOLE_BASE);

     // 设置接收 FIFO 级别
     UARTFIFOLevelSet(UART_CONSOLE_BASE, rxTrigLevel);

}

void UARTEnable (unsigned int baseAdd)
{
    /* Enable the Tx, Rx and the free running mode of operation. */
    HWREG(baseAdd + UART_PWREMU_MGMT) = (UART_FREE_MODE  |       \
                                         UART_RX_RST_ENABLE |    \
                                         UART_TX_RST_ENABLE);
}

void UARTConfigSetExpClk (unsigned int baseAdd, unsigned int uartClk,
                          unsigned int baudrate, unsigned int config,
                          unsigned int overSampRate)
{                                         
    unsigned int divisor = 0;
    
    /* Calculating the divisor value */
    switch (overSampRate)
    {
        case UART_OVER_SAMP_RATE_13:
            divisor = uartClk/(baudrate * 13);
            HWREG(baseAdd + UART_MDR) = UART_OVER_SAMP_RATE;
        break;
        
        case UART_OVER_SAMP_RATE_16:
        default:
            divisor = uartClk/(baudrate * 16);
            HWREG(baseAdd + UART_MDR) &= ~UART_OVER_SAMP_RATE;
        break;
    }
    
    /*
    ** Writing the divisor value onto the Divisor Latch registers.
    ** Programming the divisor latch registers with an appropriate value sets
    ** the corresponding baud rate of communication for the device.
    */
    HWREG(baseAdd + UART_DLL) = ((divisor & 0xFF));
    HWREG(baseAdd + UART_DLH) = ((divisor & 0xFF00) >> 8);

    /*
    ** Write only relevant values to the LCR. LCR controls the number of data
    ** bits and stop bits per frame, parity enable feature, type of parity
    ** (even of odd), stick parity enable feature, Break control and DLAB
    ** selection bits.
    */

    HWREG(baseAdd + UART_LCR) = (config & ( UART_STOP_BIT | UART_WORDL |          \
                                            UART_PARITY | UART_SET_PARITY_TYPE |  \
                                            UART_STICK_PARITY | UART_BREAK_CTRL | \
                                            UART_DLAB));
}

void UARTFIFOEnable(unsigned int baseAdd)
{
    HWREG(baseAdd + UART_FCR) = (UART_FIFO_MODE | UART_RX_CLEAR |
                                 UART_TX_CLEAR);
}

void UARTFIFOLevelSet (unsigned int baseAdd, unsigned int rxLevel)
{
     HWREG(baseAdd + UART_FCR) = ((rxLevel & (UART_RX_TRIG_LEVEL)) |
                                              UART_FIFO_MODE);
}