求助，关于TMS320DM814x，EDMA外部事件触发的疑问

Liu Han，

请参考论坛讨论：

https://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/t/184939

For the EDMA external events, these are active HIGH and cannot be configured, a transition from inactive (low) to active (high) will set the Event Register (ER). They can be anything equal to or greater than 3P,  P being period of the EDMA clock (which is the same as the L3 clock period).

EDMA_EVT0_MUX0 (edma_evt0 on mux0) is configured in PINCNTL133 register, EDMA_EVT0_MUX1 (edma_evt0 on mux1) is configured in PINCNTL116.

EDMA_EVT1_MUX0 (edma_evt1 on mux0) is configured in PINCNTL132 register, EDMA_EVT1_MUX1 (edma_evt1 on mux1) is configured in PINCNTL80.

EDMA_EVT2_MUX0 (edma_evt2 on mux0) is configured in PINCNTL131 register, EDMA_EVT2_MUX1 (edma_evt2 on mux1) is configured in PINCNTL16.

EDMA_EVT3_MUX0 (edma_evt3 on mux0) is configured in PINCNTL127 register, EDMA_EVT3_MUX1 (edma_evt3 on mux1) is configured in PINCNTL15.

There is also TPCC's EVT_MUX_[#evt_number] register (in Control Module), which map different DMA event source to TPCC event number:

0x1C (28) - select EDMA_EVT0 Pin
0x1D (29) - select EDMA_EVT1 Pin

0x1E (30) - select EDMA_EVT2 Pin

0x1F (31) - select  EDMA_EVT3 Pin