每个link的逻辑结构如下图
| Number of input queues |
| Number of output queues |
| Input Type |
| Input Data format |
| Output Data format |
| Frame-rate control |
| Channel enable/disable |
| Dynamic resolution change |
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小小补充一点,这里“Link”可以理解为“module”,有时候从字面上去理解(Link,链接)有些困惑。一个link就是实现一个功能的模块。
请教一下,除了mergelink以外,一个link可以接收多个输入吗?比如说a8从两处得到码流,都输入到videom3的ipcbitsinrtos这个link上。