The TMS320C6472/TMS320TCI6486 has six C64x+ Megamodule cores that run at 500 MHz, 625 MHz, or 700 MHz. This document has been written based on the performance of the C6472/TCI6486 device running at 500 MHz and 625 MHz. Each megamodule has 32KB of L1D…
This application report contains implementation instructions for the DDR2 interface contained on the TMS320C6472/TMS320TCI6486 DSP devices. The approach to specifying interface timing for the DDR2 interface is quite different than on previous devices…
This application report describes system design considerations for the TMS320C6472/TMS320TCI6486 (C6472/TCI6486) Digital Signal Processor (DSP). The objective of this document is to simplify the design of the C6472/TCI6486 device into a system/board design…
The TMS320C6472 device is a Texas Instruments next-generation fixed-point digital signal processor (DSP) targeting high-performance computing applications, including high-end industrial, mission-critical, high-end image and video, communication, media…
This Power-On Self Test (POST) is designed to verify the operation of the TMS320TCI6486/TMS320C6472. Ten modules are included in this test: Chk6xTest, MemoryEdmaTest, TimerTest, TsipTest, I2cTest, SrioTest, EmacTest, MdioTest, and MultigemTest. These…
The TMS320TCI6486/TMS320C6472 device contains two independent Ethernet MAC modules, EMAC0 and EMAC1, and a shared MDIO controller. This document describes system implementation details of the EMAC and MDIO modules on TCI6486/C6472 device. For a detailed…
