hi ti：
I am looking for a DC-DC Boost/Buck converter chip solution and would appreciate your recommendation on a suitable model.
The specific operating conditions are: the input voltage ranges from 14V to 21V, requiring a stable output of 18V at 8A.…
Part Number: LMR16030PEVM Other Parts Discussed in Thread: LMR16030 Hello, I have encountered some technical problems when using the LMR16030 chip. Could you help me solve them? Design requirements: need to design DC-DC circuit. The input is 18V to 60V,…
When the relay closes upon meeting the closing conditions, an overcurrent fault occurs during subsequent voltage boosting. I set the relay's closing condition to 1000V (intended to keep it open), and replaced the NTC resistor with one having much higher…
Part Number: CDCLVD1204 I used a CDCLVD1204 as a clock fan out, and the schematic diagram is shown below. The input of channel 0 is provided by a crystal oscillator, while channel 1 is an external input. SEL control is controlled by FPGA. When channel…
Part Number: CDCLVD1204
Dear experts I used a CDCLVD1204 as a clock fan out, and the schematic diagram is shown below. The input of channel 0 is provided by a crystal oscillator, while channel 1 is an external input. SEL control is controlled by FPGA.…
您好
https://www.ti.com.cn/cn/lit/ug/sluucw8/sluucw8.pdf
For accurate battery voltage sensing when using the sensing buffer, the PACK pin must be powered and VPACK > VBAT + 0.7 V. The sensing protection thresholds (BCP, BCN, BDP, and BDN) provide short…
Part Number: OPA838
Here's my schematic why I can't output a properly amplified signal when the input signal amplitude is 1.5V.
When I input a signal amplitude of 1.2V it is ok. And according to the info in the manual a 1.5V signal is not outside…
Hi,
They are similar specs, which is why the numbers are so close, but we measure them differently.
SNR is measured by grounding the ADC inputs to 0. The resulting digital output from the ADC will be the effective noise floor of the ADC. SNR by definition…
