The TMS320C6472/TMS320TCI6486 has six C64x+ Megamodule cores that run at 500 MHz, 625 MHz, or 700 MHz. This document has been written based on the performance of the C6472/TCI6486 device running at 500 MHz and 625 MHz. Each megamodule has 32KB of L1D…
This application report contains implementation instructions for the DDR2 interface contained on the TMS320C6472/TMS320TCI6486 DSP devices. The approach to specifying interface timing for the DDR2 interface is quite different than on previous devices…
This application report describes system design considerations for the TMS320C6472/TMS320TCI6486 (C6472/TCI6486) Digital Signal Processor (DSP). The objective of this document is to simplify the design of the C6472/TCI6486 device into a system/board design…
