TLV320AIC3104: TLV320AIC3104 和 TLV320AIC3101 采用相同的配置，PCM 左模式输入，8K采样率，BCLK 2.048M, 3104无声音输出

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你好，

我注意到脚本中你将 DAC_L1 路径路由到了 HPROUT，而且这是唯一的输出引脚。这是你的本意吗？我还看到数据偏移了 3 个 BCLK，这也很奇怪。请告诉我你希望哪些引脚有输出，原理图会很有帮助。我会附上脚本的逐行注释。

w 30 66 22 #clkdiv_in=mclk, pllclk_in uses bclk
w 30 65 00 #codec_Clkin uses plldiv_out
w 30 02 AA #fs=fsref/6 for both adc and dac
w 30 03 91 #pll enabled, q=2, p=1
w 30 04 C0 #j=48
w 30 05 00 #d=0
w 30 06 00 #d=9
w 30 0B 01 #r=1
w 30 7  0a #48kfsref, ldac and rdac plays respectively
w 30 8  00 #slave mode
w 30 9  07 #i2s mode, 16 bit, resync ?
w 30 F  2c #ladc pga not muted, gain=22dB
w 30 10 00 #radc pga not muted, gain=0db
w 30 11 0f #mic2l connected to ladc pga, mic2r not connected
w 30 12 ff #mic2 not connected to radc pga
w 30 13 fd #ladc powered up, soft stepping
w 30 15 f8 #mic1rp not connected to ladc
w 30 16 FD #radc powered up, soft stepping
          
w 30 19 80 #MICBIAS=2.5V
w 30 25 e0 #l+rdac powerted up, hplcom is single ended output independent
w 30 26 14 #hprcom ind. single ended output, short circuit protection enabled
w 30 28 81 #output cm=1.65v, output soft stepping
w 30 29 00 #dac_l1, dac_r1
w 30 2A 6c #output power on=100ms, driver ramp up step time=4ms
w 30 2B 00 #ldac not muted, 0db
w 30 2C 00 #rdac not muted, 0db
          
          
w 30 3D 00 #dac_l1 not routed to hprout
w 30 41 06 #hprout muted, not fully powered up
          
          
          
          
          
          
          
          
          
          
w 30 3D 80 #dac_l1 is routed to HPROUT
w 30 41 0d #hprout not muted, fully powered up
w 30 09 C0 #left justified mode, 16 bit
w 30 0A 03 #data offset=3bclks