我正在使用CDCDB400作为PCIE时钟扩展,但是我的输入时钟信号是HCSL,默认要连接的设备也是HCSL的,在这种情况下应该怎样设计电路?
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您好,CDCDB400的输入输出都是兼容HCSL电平的。所以不需要AC耦合重新建立新的共模电压,输入输出都是可以前端driver输出和后端receiver直接DC耦合连接的。
可以直接参考EVM user's guide中的电路: