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这是AFE0064的时序图，从芯片资料可以发现IRST上升沿时，SHR和滤波器的旁路开关都是导通，那么在STI下降沿和CLK上升沿时，其读出的输出电压应为保持电容上的两个电压差(VSHS-VSHR)，但是此时重新复位信号采样，这会对上一时刻复位信号覆盖，导致输出电压错误，请问这个时序是否有问题
