为什么采集不到数据，请大家帮我看看我的寄存器配置对不对，我想排除一下程序问题，我是模拟spi配置寄存器，
#ifndef LMP90080_H_
#define LMP90080_H_
#define uint unsigned int
#define uchar unsigned char
//Power and Reset Registers address
#define RESTCN 0x00 //Register and Conversion Reset 0xC3
#define SPI_RESET 0x02 //0x1: SPI Reset Enabled
#define PWRCN 0x08 //0x00: Active Mode 0x01: Power-down Mode 0x03: Stand-by Mode
//ADC Registers address
#define ADC_RESTART 0x0B //0x01: Restart conversion
#define ADC_AUXCN 0x12 //0x70: Selects internal clock
#define ADC_DONE 0x18 //0x00: Data Available
#define ADC_DOUTH 0x1A //ADC Conversion Data [15:8]
#define ADC_DOUTL 0x1B //ADC Conversion Data [7:0]
//Channel Configuration Registers address
#define CH_STS 0x1E //0x00:通道有效
#define CH_SCAN 0x1F //0x98:多通道持续转换，从CH0~CH3
#define CH0_INPUTCN 0x20 //0x01:Disable Sensor Diagnostics,Select VREFP1 and VREFN1,
// Positive input select:VIN0,Negative input select:VIN1
#define CH1_INPUTCN 0x22 //0x13:Disable Sensor Diagnostics,Select VREFP1 and VREFN1,
// Positive input select:VIN2,Negative input select:VIN3
#define CH2_INPUTCN 0x24 //0x25:Disable Sensor Diagnostics,Select VREFP1 and VREFN1,
// Positive input select:VIN4,Negative input select:VIN5
#define CH3_INPUTCN 0x26 //0x37:Disable Sensor Diagnostics,Select VREFP1 and VREFN1,
// Positive input select:VIN6,Negative input select:VIN7
#define CH0_CONFIG 0X21 //0X7e:增益128，有buf
#define CH1_CONFIG 0X23 //0X7e:增益128，有buf
#define CH2_CONFIG 0X25 //0X7e:增益128，有buf
#define CH3_CONFIG 0X27 //0X7e:增益128，有buf
//Calibration Registers addressBackground Calibration OFF
#define BGCALCN 0x10 //0x00: BgcalMode0: Background Calibration OFF
#define SCALCN 0x17 //0x00: Normal Mode
//SPI Registers address
#define SPI_HANDSHAKECN 0x01 //0x04:CSB拉低之后,SDO is driving
#define SPI_STREAMCN 0x03 //0x00:Normal Streaming mode
#define DATA_ONLY_1 0x09 //0x1a:Start address for the Data Only Read Transaction
#define DATA_ONLY_2 0x0a //0x01:都2个bytes
#define SPI_DRDYBCN 0x11 //0x93:D6 = DRDYB signa, Enable CRC reset on DRDYB deassertion
// Correct FGA gain error
#define SPI_CRC_CN 0x13 //0x14:Enable CRC,DRDYB is active high after ADC_DOUTL is read.
#define SPI_CRC_DAT 0x1D //0x00:Reset CRC
#define W_ADDRESS 0x10 //开始写的标志
#define CSB1_0 PORTC &=~(1<<PC0)
#define CSB1_1 PORTC |= (1<<PC0)
#define CSB2_0 PORTC &=~(1<<PC1)
#define CSB2_1 PORTC |= (1<<PC1)
#define SCLK_0 PORTC &=~(1<<PC2)
#define SCLK_1 PORTC |= (1<<PC2)
#define MOSI_0 PORTC &=~(1<<PC3)
#define MOSI_1 PORTC |= (1<<PC3)
#define Drdyb1_0 PORTD &=~(1<<PD2)
#define Drdyb1_1 PORTD |=~(1<<PD2)
#define Drdyb2_0 PORTC &=~(1<<PC5)
#define Drdyb2_1 PORTC |=~(1<<PC5)
#define LMP_MISO (PINC&0X10)
void LMP90080_WR(uint data);
uchar LMP90080_RD(void);
uchar LMP_read_data1(void)
{
uchar status;//status_h,status_l
uint URA,LRA;
uint reg = 0x1A;
URA=(reg&0xf0)>>4;
LRA=(reg&0x0f)|0xA0;
SCLK_1;
Drdyb1_1;
CSB1_0;//拉低CSB
Drdyb1_0;
SCLK_0;
LMP90080_WR(W_ADDRESS); //写地址开始
LMP90080_WR(URA);//写地址高位
LMP90080_WR(LRA);//写地址低位，写1个字节
status=LMP90080_RD();
//status_h=LMP90080_RD();
// status_l=LMP90080_RD();
SCLK_0;
CSB1_1;
//status = (status_h<<8)|(status_l>>8);
return status;
}
uchar LMP_read_data2(void)
{
uchar status;//status_h,status_l;
uint URA,LRA;
uint reg = 0x1A;
URA=(reg&0xf0)>>4;
LRA=(reg&0x0f)|0xA0;
SCLK_1;
Drdyb2_1;
CSB2_0;//拉低CSB
Drdyb2_0;
SCLK_0;
LMP90080_WR(W_ADDRESS); //写地址开始
LMP90080_WR(URA);//写地址高位
LMP90080_WR(LRA);//写地址低位，写1个字节
status=LMP90080_RD();
//status_h=LMP90080_RD();
//status_l=LMP90080_RD();
SCLK_0;
CSB2_1;
//status = (status_h<<8)|(status_l>>8);
return status;
}
//SPI写8位数据
void LMP90080_WR(uint data)
{
uint i;
for(i=0;i<8;i++)
{
SCLK_1;
if(0x80&data)
MOSI_1;
else
MOSI_0;
SCLK_0;
data<<=1;
}
}
//SPI读16位数据
uchar LMP90080_RD(void)
{
uchar data_16=0x0000;
uint i;
data_16<<=1;//读出16位数据
for(i=0;i<16;i++)
{
SCLK_1;
if(LMP_MISO==1)
data_16 |= 0x01;
SCLK_0;
data_16<<=1;
}
return data_16;
}
void LMP90080_WR_Reg(uint reg,uint value)
{
uint URA,LRA;
URA=(reg&0xf0)>>4;
LRA=reg&0x0f;
SCLK_1;
Drdyb1_1;
Drdyb2_1;
CSB1_0;//拉低CSB
CSB2_0;//拉低CSB
Drdyb1_0;
Drdyb2_0;
SCLK_0;
LMP90080_WR(W_ADDRESS); //写地址开始
LMP90080_WR(URA);//写地址高位
LMP90080_WR(LRA);//写地址低位，写1个字节
LMP90080_WR(value);
SCLK_0;
CSB1_1;
CSB2_1;
}
//LMP90080初始化子程序
void LMP90080_Config(void)
{
LMP90080_WR_Reg(RESTCN,0xC3);//发送复位命令
LMP90080_WR_Reg(SPI_RESET,0x1);//SPI Reset Enabled
LMP90080_WR_Reg(PWRCN,0x00);//Active Mode
LMP90080_WR_Reg(ADC_AUXCN,0x70); //Selects internal clock
LMP90080_WR_Reg(ADC_DONE,0x00); //Data Available
LMP90080_WR_Reg(CH_STS,0x00);//通道有效
LMP90080_WR_Reg(CH_SCAN,0x98);//多通道持续转换，从CH0~CH3
LMP90080_WR_Reg(CH0_INPUTCN,0x01);//Disable Sensor Diagnostics,Select VREFP1 and VREFN1,
//Positive input select:VIN0,Negative input select:VIN1
LMP90080_WR_Reg(CH1_INPUTCN,0x13);//Disable Sensor Diagnostics,Select VREFP1 and VREFN1,
//Positive input select:VIN2,Negative input select:VIN3
LMP90080_WR_Reg(CH2_INPUTCN,0x25);//Disable Sensor Diagnostics,Select VREFP1 and VREFN1,
//Positive input select:VIN4,Negative input select:VIN5
LMP90080_WR_Reg(CH3_INPUTCN,0x37);//Disable Sensor Diagnostics,Select VREFP1 and VREFN1,
//Positive input select:VIN6,Negative input select:VIN7
LMP90080_WR_Reg(CH0_CONFIG,0X7e);//增益128，有buf
LMP90080_WR_Reg(CH1_CONFIG,0X7e);//增益128，有buf
LMP90080_WR_Reg(CH2_CONFIG,0X7e);//增益128，有buf
LMP90080_WR_Reg(CH3_CONFIG,0X7e);//增益128，有buf
LMP90080_WR_Reg(BGCALCN,0x00);//Background Calibration OFF
LMP90080_WR_Reg(SCALCN,0x00);//Normal Mode
LMP90080_WR_Reg(SPI_HANDSHAKECN,0x00);//CSB拉低之后,SDO is driving
LMP90080_WR_Reg(SPI_STREAMCN,0x00);//Normal Streaming mode
LMP90080_WR_Reg(SPI_DRDYBCN,0xa3);//D6 = DRDYB signa, Enable CRC reset on DRDYB deassertion
//correct FGA gain error
//LMP90080_WR_Reg(SPI_CRC_CN,0x14);//Enable CRC,DRDYB is active high after ADC_DOUTL is read.
//LMP90080_WR_Reg(SPI_CRC_DAT,0x00);//Reset CRC
}
void LMP_port_init(void)
{
//SDO:PC4,SDI:PC3,SCLK:PC2,CSB1:PC0,CSB2:PC1,DRDYB1:PD2,DRDYB2:PC5
DDRC |= (1<<PC5) | (1<<PC3) | (1<<PC2) | (1<<PC1) | (1<<PC0) ; // ->output
DDRD |= (1<<PD2);
DDRC &= ~(1<<PC4);
CSB1_1;
CSB2_1;
SCLK_0;
Drdyb1_0;
Drdyb2_0;
}
#endif /* LMP90080_H_ */
