以DAC5681z为例,DAC芯片从FPGA读数据,然后按照自己的采样速率CLKIN/CLKINC 每隔16bit转换成1个电平值,为什么还需要一个DCLKP/N呢?
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以DAC5681z为例,DAC芯片从FPGA读数据,然后按照自己的采样速率CLKIN/CLKINC 每隔16bit转换成1个电平值,为什么还需要一个DCLKP/N呢?