C6748通过MCBSP配置成SPI方式与ADS8326通讯实现AD转换，时钟、数据波形用示波器显示正常，但是MCBSP的DRR寄存器值始终是0，求指点.....
void McBSP0Init(void)
{
#ifdef MCBSP_ADC
// 禁用 FRST GRST XRST RRST
McBSP0Regs.SPCR.bit.FRST=0;
McBSP0Regs.SPCR.bit.GRST=0;
McBSP0Regs.SPCR.bit.XRST=0;
McBSP0Regs.SPCR.bit.RRST=0;
// McBSP0 串行口控制寄存器
McBSP0Regs.SPCR.bit.DLB=0;
McBSP0Regs.SPCR.bit.RJUST=0;
McBSP0Regs.SPCR.bit.CLKSTP = 3; //CLKSTP = 11b; The clock stop mode.
McBSP0Regs.SPCR.bit.DXENA = 0;
McBSP0Regs.SPCR.bit.FREE=1;
McBSP0Regs.SPCR.bit.SOFT=0;
McBSP0Regs.RCR.bit.RDATDLY = 1; //接收数据延迟配置为1位数据延迟
McBSP0Regs.RCR.bit.RPHASE = 0; //每帧设置为1相
McBSP0Regs.RCR.bit.RFRLEN1 = 0; //每帧1个字
McBSP0Regs.RCR.bit.RWDLEN1 = 4; //每字24位
McBSP0Regs.RCR.bit.RWDREVRS=0; // 无数据位倒置
McBSP0Regs.XCR.bit.XDATDLY = 1; //发送数据延迟配置为0位数据延迟
McBSP0Regs.XCR.bit.XPHASE = 0;
McBSP0Regs.XCR.bit.XFRLEN1 = 0;
McBSP0Regs.XCR.bit.XWDLEN1 = 4; //24位
McBSP0Regs.SRGR.bit.FSGM = 1; //在每个字传输期间FSX信号有效
McBSP0Regs.SRGR.bit.GSYNC = 0;
McBSP0Regs.SRGR.bit.CLKSM = 1; //采样率发生器的始终来源于CPU时钟
McBSP0Regs.SRGR.bit.CLKSP = 0; //CLKS上升沿产生CLKG和FSG
McBSP0Regs.SRGR.bit.CLKGDV = 29; //采样率发生器的始终分频系数设定为29， CLKG=CPU CLOCK/(1+CLKGDV)
McBSP0Regs.SRGR.bit.FPER = 49; //设置帧周期为（49+1）*CLKG
McBSP0Regs.SRGR.bit.FWID = 23; //23 设置帧宽度为（1+FWID）*CLKG
/*************************************************************/
/* 时钟开始于下降沿（有延迟），缓冲串口在CLKX下降沿前半个时钟周期发送数据，在CLKR下降沿接收数据 */
McBSP0Regs.PCR.bit.CLKXM = 1; //设置CLKX0引脚为输出引脚
McBSP0Regs.PCR.bit.CLKRM = 0;
McBSP0Regs.PCR.bit.FSXM = 1; //配置FSX0引脚为输出
McBSP0Regs.PCR.bit.FSRM = 0;
McBSP0Regs.PCR.bit.SCLKME= 0;
McBSP0Regs.PCR.bit.FSXP = 1;
McBSP0Regs.PCR.bit.FSRP = 0;
McBSP0Regs.PCR.bit.CLKRP = 0;
McBSP0Regs.PCR.bit.CLKXP = 0; //配置FSX引脚高电平有效
// 延时等待内部同步
unsigned char i;
for(i=0;i<200;i++)
asm (" nop");
// 使能 接收
McBSP0Regs.SPCR.bit.RRST = 1;
// 使能 接收帧同步信号
McBSP0Regs.SPCR.bit.FRST = 1;
// 使能 内部采样率生成器
McBSP0Regs.SPCR.bit.GRST = 1;
// 使能 发送
McBSP0Regs.SPCR.bit.XRST = 1;
for(i=0;i<100;i++)
asm (" nop ");
#endif
}
