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Dear Ti,
目前我們PANEL端沒有訊號輸出,
請問如下硬體線路是否有問題呢?
感謝!
I2C的SCL，SDA都上拉了 1.8V
PANEL端有加匹配電阻.
目前SW讀的到暫存器.
想了解SN65DSI84ZQER有哪些軟體基本設定?
感謝~
目前軟體主要設定如下：
sn65_write_reg(0x09, 0x01);
//SOFT_RESET sn65_write_reg(0x0D, 0x00);
//PLL_EN: Disable sn65_write_reg(0x0A, 0x0F);
//LVDS_CLK_RANGE, 011 – 87.5 MHz ≤ LVDS_CLK < 112.5 MHz, MIPI D-PHY channel A HS continuous clock ret |= sn65_write_reg(0x0B, 0x20);
//DSI_CLK_DIVIDER, Divide DSI_CLK by 5
sn65_write_reg(0x10, 0x20); //CHA_DSI_LANES, 4 lanes are enabled
sn65_write_reg(0x12, 0x59); //CHA_DSI_CLK_RANGE (89.0MHz~90.2MHz by panel) * DSI_CLK_DIVIDER ==> 445MHz~451MHz
sn65_write_reg(0x0D, 0x01); //PLL_EN: enable sn65_write_reg(0x09, 0x00); //SOFT_RESET
