This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
想问一下，如果发端LVDS 设计时采用此芯片（SN65LVDS31），收端进行匹配设计时能否直接将LVDS信号输入至FPGA管脚，只要约束成100欧姆？这样的设计是否可行？
很着急，请尽快解答，谢谢！！！
匹配设计是在靠近LVDS接收端端接100ohm电阻。
