[参考译文] TMS570LS0714：DMA-SCI

您好、Cherry、

我不理解客户提到的工作方法

如果使用 SCI 中的 scireceivebyte 功能在 data1中存储 sci 的 Rx 并从 DMA 生成请求、请将 data1放置在数据中、则 DMA 能够正常工作。

您能要求他澄清上述问题吗？

我 还有以下疑问  

DMA 使用的触发源是什么？

客户是否使用启用了 DMA 的多缓冲 SCI 模式？ 如果是、那么他在 SCIFORMAT 寄存器中配置的长度值是多少？

客户代码是否可披露？ 如果是、您可以要求他分享他的代码吗？

--

谢谢、

Jagadish。

您好  Jagadish、

感谢您的支持、我从客户那里获得了一些更新：

[~ userid="524805" URL" URL"μ C/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1119122/tms570ls0714-dma-sci/4149134#4149134 "]用于 DMA 的触发源是什么？

DMA 的触发源是 SCI 的 RX。

[~ userid="524805" URL" URL"μ C/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1119122/tms570ls0714-dma-sci/4149134#4149134"]客户是否使用启用了 DMA 的 MultiSCI 缓冲模式？ 如果是、那么他在 SCIFORMAT 寄存器中配置的长度值是多少？[/QUERQ]

不、它们没有启用 DMA 多缓冲 模式。

[~用户名="524805" URL" URL ="μ C/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1119122/tms570ls0714-dma-sci/4149134#4149134"]客户代码是否可披露？ 如果是、您可以让他分享他的代码吗？

部分代码如下所示：

/** @file sys_main.c 
*   @brief Application main file
*   @date 11-Dec-2018
*   @version 04.07.01
*
*   This file contains an empty main function,
*   which can be used for the application.
*/

/* 
* Copyright (C) 2009-2018 Texas Instruments Incorporated - www.ti.com 
* 
* 
*  Redistribution and use in source and binary forms, with or without 
*  modification, are permitted provided that the following conditions 
*  are met:
*
*    Redistributions of source code must retain the above copyright 
*    notice, this list of conditions and the following disclaimer.
*
*    Redistributions in binary form must reproduce the above copyright
*    notice, this list of conditions and the following disclaimer in the 
*    documentation and/or other materials provided with the   
*    distribution.
*
*    Neither the name of Texas Instruments Incorporated nor the names of
*    its contributors may be used to endorse or promote products derived
*    from this software without specific prior written permission.
*
*  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
*  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
*  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
*  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
*  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
*  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
*  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
*  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
*  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
*  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
*  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/


/* USER CODE BEGIN (0) */
/* USER CODE END */

/* Include Files */

#include "sys_common.h"

/* USER CODE BEGIN (1) */
#include "system.h"
#include "rti.h"
#include "het.h"
#include "gio.h"
#include "can.h"
#include "esm.h"
#include "sys_core.h"
#include "structdef.h"
#include "sci.h"
#include "spi.h"
#include "sys_dma.h"

#define DMA_SCI_RX  28
#define SCI_SET_RX_DMA      (1<<17)
#define SCI_SET_RX_DMA_ALL  (1<<18)
#define SCI_RX_ADDR ((uint32_t)(&(scilinREG->RD)))
g_dmaCTRL g_dmaCTRLPKT;
/* USER CODE END */

/** @fn void main(void)
*   @brief Application main function
*   @note This function is empty by default.
*
*   This function is called after startup.
*   The user can use this function to implement the application.
*/

/* USER CODE BEGIN (2) */
union unOBCTXDATA1{
    struct stBYTETEMP       ObcTxByte1;
    struct unOBCTXWORD1     ObcTxWord1;
};
union unOBCTXDATA2{
    struct sciBYTETEMP      ObcTxByte2;
    struct unOBCTXWORDSCI   ObcTxWord2;
};
spiDAT1_t dataconfig1_t;
uint8 tx_data1[8];
uint8 tx_data2[8];
uint8 tx_data3[8];
uint8 tx_data4[8];
uint8 tx_data5[8];
uint8 tx_data6[8];
uint8 tx_data7[8];
uint8 tx_data8[8];
uint8 sci_tx_data[3];
uint8 rx_data[100] = {0};
uint8 rx_data1[100] = {0};
uint16 spi_txdata[8];
uint16 spi_rxdata[8];
uint16 length;
uint32 sciRxData;
//int delay_flag;
void Can_ObcData1_Send(void);
void spi_HVLV_SendandRecieve(void);
void dma_init(void);
void dmaConfigCtrlPacket(uint32 sadd,uint32 dadd,uint32 dsize);
/* USER CODE END */

int main(void)
{
/* USER CODE BEGIN (3) */
    sciRxData = SCI_RX_ADDR;
    uint16_t i;
    spiInit();
    gioInit();
    rtiInit();
    hetInit();
    canInit();
    sciInit();
    dma_init();
    rtiEnableNotification(rtiNOTIFICATION_COMPARE0);
    _enable_IRQ();
    dmaEnable();
    scilinREG->SETINT |= SCI_SET_RX_DMA | SCI_SET_RX_DMA_ALL;
    gioSetBit(hetPORT1, 14, 0); //将CAN设置为normal
    rtiStartCounter(rtiCOUNTER_BLOCK0);
    length = 0;
    for(i=0;i<8;i++)
    {
    spi_txdata[i] = 0;
    spi_rxdata[i] = 0;
    }
    dataconfig1_t.CSNR = 0;
    dataconfig1_t.CS_HOLD = 0;
    dataconfig1_t.DFSEL = SPI_FMT_0;
    dataconfig1_t.WDEL = 1;
    while(1)
    {
        if(sciReceiveByte(scilinREG) == 0xFF)
        {
        for(length=0;length<16;length++)
        {
            rx_data[length]  = sciReceiveByte(scilinREG);
//            rx_data1[length]  = sciReceiveByte(scilinREG);
        }
        }
    }
/* USER CODE END */

    return 0;
}


/* USER CODE BEGIN (4) */
void dma_init(void)
{
    dmaReqAssign(DMA_CH0, DMA_SCI_RX);
    dmaConfigCtrlPacket((uint32)(sciRxData),(uint32)(rx_data),16);
//    dmaConfigCtrlPacket((uint32)(rx_data1),(uint32)(rx_data),16);
    dmaSetCtrlPacket(DMA_CH0,g_dmaCTRLPKT);
    dmaSetChEnable(DMA_CH0, DMA_HW);

}
void rtiNotification(uint32 notification)
{
/*  enter user code between the USER CODE BEGIN and USER CODE END. */
    /* Toggle HET pin 0 */
    gioSetBit(hetPORT1, 22, gioGetBit(hetPORT1, 22) ^ 1);
    spi_HVLV_SendandRecieve();
    Can_ObcData1_Send();
    Sci_ObcData1_Send();

}
//void Can_ObcData1_Send(void)
//{
//    union unOBCTXDATA1  ObcTxData1 = {0};
//        int j;
////        Get_Obc_Message();
//
//        ObcTxData1.ObcTxWord1.OBC_Status = 0x001;
//        ObcTxData1.ObcTxWord1.PFC_Error_State = 0x001;
//        ObcTxData1.ObcTxWord1.OBC_Output_Vol_H = 3000/256;
//        ObcTxData1.ObcTxWord1.OBC_Output_Vol_L = 3000%256;
//        ObcTxData1.ObcTxWord1.OBC_Input_Cur_H = 3000/256;
//        ObcTxData1.ObcTxWord1.OBC_Input_Cur_L = 3000%256;
//        ObcTxData1.ObcTxWord1.OBC_Input_Vol_H = 3000/256;
//        ObcTxData1.ObcTxWord1.OBC_Input_Vol_L = 3000%256;
//
//        for(j = 0; j < 8; j++)
//        {
//            tx_data[j] = ObcTxData1.ObcTxByte1.ByteTemp[j];
//        }
//
//        canTransmit(canREG2, canMESSAGE_BOX1, tx_data);
////        while(!canIsRxMessageArrived(canREG1, canMESSAGE_BOX2));
////            canGetData(canREG1, canMESSAGE_BOX2, rx_data);  /* receive on can2  */
//
//}
void spi_HVLV_SendandRecieve(void)
{
    spiTransmitAndReceiveData(spiREG2,&dataconfig1_t,4,spi_txdata,spi_rxdata);
    spi_txdata[0] ++;
}
void Can_ObcData1_Send(void)
{
    int j;
    for(j = 0; j < 8;j++)
    {
        tx_data1[j] = rx_data[j];
    }
    for(j = 0; j < 8;j++)
    {
        tx_data2[j] = rx_data[j+8];
    }
    for(j = 0; j < 8;j++)
    {
        tx_data3[j] = rx_data[j+16];
    }
    for(j = 0; j < 8;j++)
    {
        tx_data4[j] = rx_data[j+24];
    }
    for(j = 0; j < 8;j++)
    {
        tx_data5[j] = rx_data[j+32];
    }
    for(j = 0; j < 8;j++)
    {
        tx_data6[j] = rx_data[j+40];
    }
    for(j = 0; j < 8;j++)
    {
        tx_data7[j] = rx_data[j+48];
    }
    canTransmit(canREG2, canMESSAGE_BOX1, tx_data1);
    canTransmit(canREG2, canMESSAGE_BOX2, tx_data2);
    canTransmit(canREG2, canMESSAGE_BOX3, tx_data3);
    canTransmit(canREG2, canMESSAGE_BOX4, tx_data4);
    canTransmit(canREG2, canMESSAGE_BOX5, tx_data5);
    canTransmit(canREG2, canMESSAGE_BOX6, tx_data6);
    canTransmit(canREG2, canMESSAGE_BOX7, tx_data7);
//    canTransmit(canREG2, canMESSAGE_BOX2, tx_data8);
}
Sci_ObcData1_Send()
{
    union unOBCTXDATA2  ObcTxData2 = {0};
        int j1;
    ObcTxData2.ObcTxWord2.OBC_CONTROL = 0x001;
    ObcTxData2.ObcTxWord2.OBC_REF_V_H = 3000/256;
    ObcTxData2.ObcTxWord2.OBC_REF_V_L = 3000%256;
    for(j1 = 0; j1 < 3; j1++)
    {
        sci_tx_data[j1] = ObcTxData2.ObcTxByte2.SCIByteTemp[j1];
    }
    sciSend(scilinREG,3,sci_tx_data);
}

void dmaConfigCtrlPacket(uint32 sadd,uint32 dadd,uint32 dsize)
{
  g_dmaCTRLPKT.SADD      = sadd;              /* source address             */
  g_dmaCTRLPKT.DADD      = dadd;              /* destination  address       */
  g_dmaCTRLPKT.CHCTRL    = 0;                 /* channel control            */
  g_dmaCTRLPKT.FRCNT     = dsize;                 /* frame count                */
  g_dmaCTRLPKT.ELCNT     = 1;             /* element count              */
  g_dmaCTRLPKT.ELDOFFSET = 0;                 /* element destination offset */
  g_dmaCTRLPKT.ELSOFFSET = 0;                 /* element destination offset */
  g_dmaCTRLPKT.FRDOFFSET = 0;                 /* frame destination offset   */
  g_dmaCTRLPKT.FRSOFFSET = 0;                 /* frame destination offset   */
  g_dmaCTRLPKT.PORTASGN  = 4;                 /* port b                     */
  g_dmaCTRLPKT.RDSIZE    = ACCESS_8_BIT;     /* read size                  */
  g_dmaCTRLPKT.WRSIZE    = ACCESS_8_BIT;     /* write size                 */
  g_dmaCTRLPKT.TTYPE     = FRAME_TRANSFER ;   /* transfer type              */
//  g_dmaCTRLPKT.ADDMODERD = ADDR_INC1;         /* address mode read          */
  g_dmaCTRLPKT.ADDMODERD = ADDR_FIXED;         /* address mode read          */
  g_dmaCTRLPKT.ADDMODEWR = ADDR_INC1;       /* address mode write         */
  g_dmaCTRLPKT.AUTOINIT  = AUTOINIT_ON;       /* autoinit                   */
}


/* USER CODE END */

谢谢、此致、

樱桃

您好  Jagadish、

[~ userid="524805" URL" URL"μ C/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1119122/tms570ls0714-dma-sci/4149134#4149134"]

我不理解客户提到的工作方法

如果使用 SCI 中的 scireceivebyte 功能在 data1中存储 sci 的 Rx 并从 DMA 生成请求、请将 data1放置在数据中、则 DMA 能够正常工作。

[/报价]

请让我澄清一下：

DMA 机制是将地址 A 的内容移动到地址 B、这是正确的吗？

客户之前错误地认为硬件请求没有发送、因此他们使用 SCI 的接收功能来获取通信结果值并将其存储在阵列 data1中。 在读取完成后(当转换从数组数据1传递到数据时)、CH0通道转换由软件触发、并且发现数据数组正确获取数据1中的数字、这表示 DMA 配置正确。 然后、软件触发器被修改为 SCI 硬件触发器、并且也获得了正确的结果。

但是、如果源地址更改为 scilinReg 的 RD 寄存器、则接收到的大多数 DMA 结果为零。

谢谢、此致、

樱桃