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[参考译文] TM4C123GH6PM:用于 Cypress FM24CL04B 和 Fujitsu MB85RC1MTPNF FRAM 的 Tiva i2c 驱动器、两字节寄存器地址

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请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1133785/tm4c123gh6pm-tiva-i2c-driver-for-cypress-fm24cl04b-and-fujitsu-mb85rc1mtpnf-fram-two-byte-register-address

器件型号:TM4C123GH6PM

我有一个在三个不同的电路板上运行的超低功耗应用、2个使用 TM4C123GH6PGEI 144引脚、最新的使用 TM4C123GH6PMIR 64引脚。   I2C0位于同一引脚多路复用引脚上。

该应用需要外部低功耗存储器来存储易失性状态变量和"采样 num"等内容。   片上 EEPROM 不是一个选项、因为我们的部署持续一年以上、远远超过了额定的50万写入周期。   我已经尝试过 HIB 模块 RAM、但是、我们希望存储的内容要多于 HIB RAM 可以容纳的内容、因此我们使用了 FRAM。

前两个电路板使用 Cypress FRAM FM24CL04B、后者具有单字节寄存器地址、最新电路板使用更大的 Fujitsu MB85RC1MTPNF FRAM、因为我们计划缓存样本数据、然后 以突发块的方式写入外部 NAND 闪存或 microSD。

用于较小4KB FRAM 的 I2C 驱动程序工作正常。    我的问题是如何为更大的128KB Fujitsu FRAM 写入两个字节的地址。   该图显示了 i2c 字节序列。

我的 Cypress 的 i2c 驱动程序对 rom_i2cmasterdataaput 进行了一次调用...    我要做的是如下所示:

//将要写入的地址放在数据寄存器中。
#if Fujitsu_BIGFRAM = 1.
ROM_I2CMasterDataPut (I2C0_BASE、(uint8_t)(ucStart_addr/256));
#endif
ROM_I2CMasterDataPut (I2C0_BASE、(uint8_t) ucStart_addr);

这是不正确的(因为它不起作用)、但我看不到16位(2字节) API。     请提供有关如何执行两个字节地址的建议。    我在 e2e 论坛上看到过其他帖子、但没有答案。

谢谢

void fram_test(void)
{
    int indx;

    uprintf("\r\n1st block of 128, write 127 to 0\r\n");
    for(indx=0; indx<128; indx++)               // 0->127
        framBuf[indx] = 127-indx;
    i2c0_write(I2C_FRAM_ADDR, framBuf, 128, 0x00);
    for(indx=0; indx<128; indx++)
    {
        uprintf("%02x ", framBuf[indx]);
        if(indx%16 == 0x0f)
            uprintf("\r\n");
    }

    uprintf("\r\n2nd block of 128, write 0 to 127\r\n");
    for(indx=0; indx<128; indx++)
        framBuf[indx] = indx;
    i2c0_write(I2C_FRAM_ADDR, framBuf, 128, 128);
    for(indx=0; indx<128; indx++)
    {
        uprintf("%02x ", framBuf[indx]);
        if(indx%16 == 0x0f)
            uprintf("\r\n");
    }

    wait_consoleTx();

    uprintf("\r\n3rd block of 128, write 255 to 128\r\n");
    for(indx=0; indx<128; indx++)
        framBuf[indx] = 255-indx;
    i2c0_write(I2C_FRAM_ADDR, framBuf, 128, 256);
    for(indx=0; indx<128; indx++)
    {
        uprintf("%02x ", framBuf[indx]);
        if(indx%16 == 0x0f)
            uprintf("\r\n");
    }

    uprintf("\r\n4th block of 128, write 128 to 255\r\n");
    for(indx=0; indx<128; indx++)
        framBuf[indx] = 128+indx;
    i2c0_write(I2C_FRAM_ADDR, framBuf, 128, 384);
    for(indx=0; indx<128; indx++)
    {
        uprintf("%02x ", framBuf[indx]);
        if(indx%16 == 0x0f)
            uprintf("\r\n");
    }

    wait_consoleTx();

    for(indx=0; indx<128; indx++)
        framBuf[indx] = 0x55;


    uprintf("\r\n1st block of 128, read:\r\n");
    i2c0_read(I2C_FRAM_ADDR, framBuf, 128, 0, FALSE);
    for(indx=0; indx<128; indx++)
    {
        uprintf("%02x ", framBuf[indx]);
        if(indx%16 == 0x0f)
            uprintf("\r\n");
    }

    uprintf("\r\n2nd block of 128, read:\r\n");
    i2c0_read(I2C_FRAM_ADDR, framBuf, 128, 128, FALSE);
    for(indx=0; indx<128; indx++)
    {
        uprintf("%02x ", framBuf[indx]);
        if(indx%16 == 0x0f)
            uprintf("\r\n");
    }

    wait_consoleTx();

    uprintf("\r\n3rd block of 128, read:\r\n");
    //i2c0_read(I2C_FRAM_ADDR|0x01, framBuf, 128, 256, FALSE);
    i2c0_read(I2C_FRAM_ADDR, framBuf, 128, 256, FALSE);
    for(indx=0; indx<128; indx++)
    {
        uprintf("%02x ", framBuf[indx]);
        if(indx%16 == 0x0f)
            uprintf("\r\n");
    }

    uprintf("\r\n4th block of 128, read:\r\n");
    i2c0_read(I2C_FRAM_ADDR, framBuf, 128, 384, FALSE);
    for(indx=0; indx<128; indx++)
    {
        uprintf("%02x ", framBuf[indx]);
        if(indx%16 == 0x0f)
            uprintf("\r\n");
    }

    wait_consoleTx();

}

/******************************************************************************
 * Initialize and configure I2C module in TIVA tm4c123gh6pge
 *            MFET uses I2C0_BASE on PB2/PB3, the other i2c periph base addr are not used
 *
 * Parameters:
 *          ui32Base: I2Cx base address. The address is one of the following values:
 *              I2C0_BASE, I2C1_BASE, I2C2_BASE, I2C3_BASE.
 *
 *      bFast:
 *              true : I2C will run in fast mode (400kbps)
 *              false: I2C will run in standard mode (100kbps)
 *
 * Return: none
 *****************************************************************************/
void i2c0_init(bool bFast)
{

    //ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);      // this is done prior in init.c

    //enable onchip I2C peripheral
    ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_I2C0);

    //reset I2C module
    ROM_SysCtlPeripheralReset(SYSCTL_PERIPH_I2C0);

    // Configure the pin muxing for I2C0 functions on port PB2(SCL) and PB3(SDA).
    ROM_GPIOPinConfigure(GPIO_PB2_I2C0SCL);     // This is the same on 144 pin part and 64pin part
    ROM_GPIOPinConfigure(GPIO_PB3_I2C0SDA);

    // Configure the appropriate pins to be I2C instead of GPIO.
    ROM_GPIOPinTypeI2C(GPIO_PORTB_BASE, GPIO_PIN_2 | GPIO_PIN_3);
    //GPIOPinTypeI2CSCL(GPIO_PORTB_BASE, GPIO_PIN_2);
    //GPIOPinTypeI2C(GPIO_PORTB_BASE, GPIO_PIN_3);


    ROM_GPIOPadConfigSet(GPIO_PORTB_BASE, GPIO_PIN_2, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
    ROM_GPIOPadConfigSet(GPIO_PORTB_BASE, GPIO_PIN_3, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_OD);

    // Initialize the I2C master - Transfer speed is defined depend on variable bFast
    ROM_I2CMasterInitExpClk(I2C0_BASE, SysCtlClockGet(), bFast);

    //clear I2C FIFOs
    HWREG(I2C0_BASE + I2C_O_FIFOCTL) = 80008000;

    ROM_I2CMasterEnable(I2C0_BASE);      //I2C is ready to use

}

/******************************************************************************
 * Write multiple bytes to a slave device
 *
 * Parameters:
 *  uiSlave_addr : the slave address
 *  *ucData    : the data that are going to be sent
 *  uiCount    : number of byte will be sent
 *  ucStart_addr : register address you want to write or a control byte
 *
 * Return: none
 * Useful info:  github.com/.../FRAM_MB85RC_I2C
 *****************************************************************************/
void i2c0_write(unsigned char uiSlave_addr, unsigned char *ucData, uint16_t uiCount, uint16_t ucStart_addr)  //void i2c0_write(unsigned char uiSlave_add, unsigned char *ucData, uint16_t uiCount, unsigned char ucStart_add)
{
    unsigned int temp = 1;
    IntMasterDisable();

    // Set the slave address and setup for a transmit operation.
    ROM_I2CMasterSlaveAddrSet(I2C0_BASE, uiSlave_addr, false);

    // Place the address to be written in the data register.
#if FUJITSU_BIGFRAM == 1      // This does not work, need to find a two byte API
    ROM_I2CMasterDataPut(I2C0_BASE, (uint8_t)(ucStart_addr/256));
#endif
    ROM_I2CMasterDataPut(I2C0_BASE, (uint8_t)ucStart_addr);

    while (ROM_I2CMasterBusy(I2C0_BASE));
    if (uiCount == 0)
        // Initiate send of character from Master to Slave
        ROM_I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_SINGLE_SEND);
    else
    {
        // Start the burst cycle, writing the address as the first byte.
        ROM_I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_START);
        // Write the next byte to the data register.
        while (ROM_I2CMasterBusy(I2C0_BASE));
        ROM_I2CMasterDataPut(I2C0_BASE, ucData[0]);
        for( ; temp < uiCount; temp++)        //Loop to send data if not the last byte
        {
            // Continue the burst write.
            ROM_I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_CONT);
            // Write the next byte to the data register.
            while (ROM_I2CMasterBusy(I2C0_BASE));
            ROM_I2CMasterDataPut(I2C0_BASE, ucData[temp]);
        }
        // Finish the burst write.
        ROM_I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_FINISH);
    }
    while (ROM_I2CMasterBusy(I2C0_BASE));
    IntMasterEnable();
}

/******************************************************************************
 * Read multiple bytes from slave device
 *
 * Parameters:
 *  uiSlave_addr: the slave address
 *  *ucRec_Data: a variable to save the data received
 *  uiCount    : number of byte will be received
 *  ucStart_addr: register address you want to read or a control byte (Bug fix 9/9/2022:  NanoFET has large 128KB FRAM, according to Fujitsu datasheet, large FRAM requires 2 bytes of address)
 *
 * Return: none
 *****************************************************************************/
void i2c0_read(unsigned char uiSlave_addr, unsigned char *ucRec_Data, uint16_t uiCount, uint16_t ucStart_addr, bool bDummyRead)   //void I2C_Read(uint32_t ui32Base, unsigned char uiSlave_add, unsigned char *ucRec_Data, uint16_t uiCount, unsigned char ucStart_add, bool bDummyRead)
{
    unsigned int uitemp = 0;
        // Set the slave address and setup for a transmit operation.

    IntMasterDisable();
    ROM_I2CMasterSlaveAddrSet(I2C0_BASE, uiSlave_addr, false);

    // Place the address to be written in the data register.
#if FUJITSU_BIGFRAM == 1      // This does not work, need to find a two byte API
    ROM_I2CMasterDataPut(I2C0_BASE, (uint8_t)(ucStart_addr/256));
#endif
    ROM_I2CMasterDataPut(I2C0_BASE, (uint8_t)ucStart_addr);

    // Start the burst cycle, writing the address as the first byte.
    ROM_I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_START);

    while (ROM_I2CMasterBusy(I2C0_BASE))
        ;
        //while (!(ROM_I2CMasterErr(ui32Base) == I2C_MASTER_ERR_NONE));

    ROM_I2CMasterSlaveAddrSet(I2C0_BASE, uiSlave_addr, true);
    if (uiCount == 1)
    {
        ROM_I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_SINGLE_RECEIVE);
        while (ROM_I2CMasterBusy(I2C0_BASE));
        ucRec_Data[0]  = ROM_I2CMasterDataGet(I2C0_BASE);
        if (bDummyRead)
        {
            while (ROM_I2CMasterBusy(I2C0_BASE));
            ucRec_Data[0]  = ROM_I2CMasterDataGet(I2C0_BASE);
        }
    }
    else
    {
        ROM_I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_BURST_RECEIVE_START);
        if (bDummyRead)
        {
            while (ROM_I2CMasterBusy(I2C0_BASE))
                ;
            ucRec_Data[0]  = ROM_I2CMasterDataGet(I2C0_BASE);
        }
        while (ROM_I2CMasterBusy(I2C0_BASE))
            ;
        ucRec_Data[uitemp++]  = ROM_I2CMasterDataGet(I2C0_BASE);
        for ( ; uitemp < (uiCount - 1); uitemp++)
        {
            ROM_I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_BURST_RECEIVE_CONT);
            while (ROM_I2CMasterBusy(I2C0_BASE))
                ;
            ucRec_Data[uitemp]  = ROM_I2CMasterDataGet(I2C0_BASE);
        }
        ROM_I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_BURST_RECEIVE_FINISH);
        while (ROM_I2CMasterBusy(I2C0_BASE))
            ;
        ucRec_Data[uitemp]  = ROM_I2CMasterDataGet(I2C0_BASE);
    }

    while (ROM_I2CMasterBusy(I2C0_BASE))
        ;
    IntMasterEnable();
}

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    后续说明:  虽然这适用于129、我使用的是123、但此文档非常有用:  https://www.ti.com/lit/an/spma073/spma073.pdf

    spma073.pdf 提及使用 lapis FeRAM (FRAM)、 MR44V064A 64k (8、192字×8位)器件。   我找不到示例代码或驱动程序、是否有?   尽管它可能不需要两个字节的地址、但它会有所帮助。

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    发现了我的问题-误解了 i2c API 的使用。   我在 FRAM 驱动器上还有工作要做、需要重新考虑以支持单字节和双字节寻址。   请参阅以下代码了解更新的 i2c0_wrte 和 i2c0_read 现在可与128KB Fujitsu 部件配合使用。

    /******************************************************************************
     * Write multiple bytes to a slave device
     *
     * Parameters:
     *  uiSlave_addr : the slave address
     *  *ucData    : the data that are going to be sent
     *  uiCount    : number of byte will be sent
     *  ucStart_addr : register address you want to write or a control byte
     *
     * Return: none
     * Useful info:  github.com/.../FRAM_MB85RC_I2C
     *****************************************************************************/
    void i2c0_write(unsigned char uiSlave_addr, unsigned char *ucData, uint16_t uiCount, uint16_t ucStart_addr)  //void i2c0_write(unsigned char uiSlave_add, unsigned char *ucData, uint16_t uiCount, unsigned char ucStart_add)
    {
        unsigned int indx;
        unsigned char i2c_addr;
    
        IntMasterDisable();
    #ifdef FROMARDUINO
        switch(density) {
            case 4:
                //chipaddress = (i2c_addr | ((framAddr >> 8) & 0x1)); //Issue #10
                i2c_addr = ((i2c_addr & 0b11111110) | ((framAddr >> 8) & 0b00000001));
                break;
            case 16:
                //chipaddress = (i2c_addr | ((framAddr >> 8) & 0x7));   //Issue #10
                i2c_addr = ((i2c_addr & 0b11111000) | ((framAddr >> 8) & 0b00000111));
                break;
            default:
                chipaddress = i2c_addr;
                break;
        }
    #endif
    
    
    
    #if FRAM_FM24CL04B == 1
        i2c_addr = (uiSlave_addr & 0xFE) | ((ucStart_addr/256) & 0x01);  // 4KB part has bit.1 of i2c_addr as the 256 byte page select
        //uprintf("\r\ni2c_addr: 0x%02x\r\n", i2c_addr);  // DEBUG
    
        //Master is initiating a write to the slave.
        ROM_I2CMasterSlaveAddrSet(I2C0_BASE, i2c_addr, FALSE); // FALSE indicates a write
    
        //write the single byte of FRAM word address
        ROM_I2CMasterDataPut(I2C0_BASE, (uint8_t)(ucStart_addr & 0x00ff));
        while (ROM_I2CMasterBusy(I2C0_BASE));
    #endif
    #if FRAM_MB85RC1M == 1
        i2c_addr = uiSlave_addr;
        // Set the slave address and setup for a transmit operation.
        ROM_I2CMasterSlaveAddrSet(I2C0_BASE, i2c_addr, false);
    
        //write the hi byte of FRAM word address
        ROM_I2CMasterDataPut(I2C0_BASE, (uint8_t)(ucStart_addr/256));
        while (ROM_I2CMasterBusy(I2C0_BASE)); // This was not here when successfully tested on NanoFET
    #endif
    
        if (uiCount == 0)
            // Initiate send of character from Master to Slave (NEEDS TESTING)
            ROM_I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_SINGLE_SEND);
        else
        {
            // Start the burst cycle, writing the address as the first byte.
            ROM_I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_START);
            while (ROM_I2CMasterBusy(I2C0_BASE));         // wait for completion
    
    #if FRAM_MB85RC1M == 1
            //write the lo byte of FRAM word address for 128KB Fujitsu
            ROM_I2CMasterDataPut(I2C0_BASE, (uint8_t)ucStart_addr);
            while (ROM_I2CMasterBusy(I2C0_BASE));        // wait for completion
    
            ROM_I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_CONT);    // send byte
            while (ROM_I2CMasterBusy(I2C0_BASE));        // wait for completion
    #endif
    
            ROM_I2CMasterDataPut(I2C0_BASE, ucData[0]);
            for(indx=1; indx<uiCount; indx++)        // loop is structured so that last dataPut is followed by SEND_FINISH
            {
                // Continue the burst write.
                ROM_I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_CONT);
                // Write the next byte to the data register.
                while (ROM_I2CMasterBusy(I2C0_BASE));
                ROM_I2CMasterDataPut(I2C0_BASE, ucData[indx]);
            }
            // Finish the burst write.
            ROM_I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_FINISH);
        }
        while (ROM_I2CMasterBusy(I2C0_BASE));
    
        IntMasterEnable();
    }
    
    /******************************************************************************
     * Read multiple bytes from slave device
     *
     * Parameters:
     *  uiSlave_addr: the slave address
     *  *ucRec_Data: a variable to save the data received
     *  uiCount    : number of byte will be received
     *  ucStart_addr: register address you want to read or a control byte (Bug fix 9/9/2022:  NanoFET has large 128KB FRAM, according to Fujitsu datasheet, large FRAM requires 2 bytes of address)
     *
     * Return: none
     *****************************************************************************/
    void i2c0_read(unsigned char uiSlave_addr, unsigned char *ucRec_Data, uint16_t uiCount, uint16_t ucStart_addr, bool bDummyRead)   //void I2C_Read(uint32_t ui32Base, unsigned char uiSlave_add, unsigned char *ucRec_Data, uint16_t uiCount, unsigned char ucStart_add, bool bDummyRead)
    {
        unsigned int indx = 0;
        unsigned char i2c_addr;
    
    
        IntMasterDisable();
    
    #if FRAM_FM24CL04B == 1
        i2c_addr = (uiSlave_addr & 0xFE) | ((ucStart_addr/256) & 0x01);  // 4Kb 512byte part has bit.1 of i2c_addr as the 256 byte page select
        //uprintf("\r\ni2c_addr: 0x%02x\r\n", i2c_addr);   // DEBUG
    
        // Set the slave address and setup for a transmit operation.
        ROM_I2CMasterSlaveAddrSet(I2C0_BASE, i2c_addr, FALSE);  // FALSE indicates a write
    
        // send single byte address for 4KB cypress fram
        ROM_I2CMasterDataPut(I2C0_BASE, (uint8_t)(ucStart_addr & 0x00ff));  // 0x00ff is not needed...
    
        // Start the burst cycle, writing the address as the first byte.
        ROM_I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_START);
        while (ROM_I2CMasterBusy(I2C0_BASE));
    #endif
    
    #if FRAM_MB85RC1M == 1
        i2c_addr = uiSlave_addr;
        // Set the slave address and setup for a transmit operation.
        ROM_I2CMasterSlaveAddrSet(I2C0_BASE, i2c_addr, false);
    
        // send the hi byte address
        ROM_I2CMasterDataPut(I2C0_BASE, (uint8_t)(ucStart_addr/256));
        //while (ROM_I2CMasterBusy(I2C0_BASE));
    
        // Start the burst cycle, writing the address as the first byte.
        ROM_I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_START);
        while (ROM_I2CMasterBusy(I2C0_BASE));
    
        //send the lo byte address
        ROM_I2CMasterDataPut(I2C0_BASE, (uint8_t)ucStart_addr);
        ROM_I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_CONT);
        while (ROM_I2CMasterBusy(I2C0_BASE));
    #endif
    
        //ROM_I2CMasterSlaveAddrSet(I2C0_BASE, uiSlave_addr, TRUE);   // True indicates a read (get)
        ROM_I2CMasterSlaveAddrSet(I2C0_BASE, i2c_addr, TRUE);   // True indicates a read (get)
        if (uiCount == 1)
        {
            ROM_I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_SINGLE_RECEIVE);
            while (ROM_I2CMasterBusy(I2C0_BASE));
            ucRec_Data[0]  = ROM_I2CMasterDataGet(I2C0_BASE);
            if (bDummyRead)
            {
                while (ROM_I2CMasterBusy(I2C0_BASE));
                ucRec_Data[0]  = ROM_I2CMasterDataGet(I2C0_BASE);
            }
        }
        else
        {
            ROM_I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_BURST_RECEIVE_START);
            if (bDummyRead)
            {
                while (ROM_I2CMasterBusy(I2C0_BASE));
                ucRec_Data[0]  = ROM_I2CMasterDataGet(I2C0_BASE);
            }
            while (ROM_I2CMasterBusy(I2C0_BASE));
    
            indx=0;
            ucRec_Data[indx++]  = ROM_I2CMasterDataGet(I2C0_BASE);
            for ( ; indx < (uiCount - 1); indx++)
            {
                ROM_I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_BURST_RECEIVE_CONT);
                while (ROM_I2CMasterBusy(I2C0_BASE));
    
                ucRec_Data[indx]  = ROM_I2CMasterDataGet(I2C0_BASE);
            }
            ROM_I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_BURST_RECEIVE_FINISH);
            while (ROM_I2CMasterBusy(I2C0_BASE));
    
            ucRec_Data[indx]  = ROM_I2CMasterDataGet(I2C0_BASE);
        }
    
        while (ROM_I2CMasterBusy(I2C0_BASE));
    
        IntMasterEnable();
    }