[参考译文] LP-AM243：确定在哪个引脚上触发 GPIO 中断

您好、Nestor Hiebl、

1. 我认为这不是中断路由器的问题,为了进一步确认这是情况还是与您的实施有关, 是否有任何方式可以共享代码片段和您的 syscfg 配置。  

2.我认为没有任何直接的 API 来获取触发中断的管脚编号,在中断时,相应的 GPIO 信号位会在寄存器中设置,所以你可以用自己的方法找出它。

同时、您可能会发现以下内容很有用：
您好，是否可以通过某种方法来判断常规 GPIO 中的哪个引脚会触发中断？ -基于 Arm 的微控制器论坛-基于 Arm 的微控制器- TI E2E 支持论坛

Br、
Shaunak

您好、感谢您的回答！

我将继续根据组中断状态计算中断引脚、但仍想知道是否可以将中断路由器配置为路由单个引脚而不是组。

以下是设置 GPIO 中断的代码。 原谅的格式,插入代码块似乎不适合我目前:

#define NUM_UDI_CONNECTIONS 8

const uint32_t udi_pin_nums[NUM_UDI_CONNECTIONS] = { /* GPIO pin num macros */ };
const uint32_t udi_pin_base_addresses[NUM_UDI_CONNECTIONS] = { /* GPIO base address macros */ };
const uint32_t udi_pin_dirs[NUM_UDI_CONNECTIONS] = { /* GPIO pin direction macros */ };
const uint32_t udi_pin_trig_types[NUM_UDI_CONNECTIONS] = { /* GPIO trigger type macros */ };
const uint32_t gpio_router_output_indices[NUM_UDI_CONNECTIONS] = { /* GPIOMUX_INTROUTER0 outputs 0 to 7 */ };

HwiP_Object gpio_hwi_objects[NUM_UDI_CONNECTIONS];

void gpio_input_interrupt_main() {
    HwiP_Params hwi_prms[NUM_UDI_CONNECTIONS];
    for (int i = 0; i < NUM_UDI_CONNECTIONS; i++) {
        uint32_t pin_addr   = (DWORD) AddrTranslateP_getLocalAddr(udi_pin_base_addresses[i]);
        uint32_t bankNum    = GPIO_GET_BANK_INDEX(udi_pin_nums[i]);
    
        GPIO_setDirMode(pin_addr, udi_pin_nums[i], udi_pin_dirs[i]);
        GPIO_setTrigType(pin_addr, udi_pin_nums[i], udi_pin_trig_types[i]);
        GPIO_bankIntrEnable(pin_addr, bankNum);

        /* Register pin interrupt */
        HwiP_Params_init(&hwi_prms[i]);
        hwi_prms[i].intNum   = gpio_router_output_indices[i];
        hwi_prms[i].callback = &UdiIsrFxn;
        /* I would expect the result of this to be that every pin is handed the
         * appropriate value of i (0-7) in its ISR. This is not the case - all
         * pins are handed 7 */
        hwi_prms[i].args     = (void *) i;
        /* There is a separate HwiP_Object instance for each pin that is kept
         * in memory for as long as the interrupt mapping are needed. */
        int32_t retVal    = HwiP_construct(&gpio_hwi_objects[i], &hwi_prms[i]);
        DebugP_assert(retVal == SystemP_SUCCESS );
    }
}

在以下函数中的其他位置处理 Sciclient GPIO 资源管理：

static void Sciclient_gpioIrqSet(uint32_t interrupt_source_index, uint32_t router_output_index)
{
int32_t retVal;
struct tisci_msg_rm_irq_set_req rmIrqReq;
struct tisci_msg_rm_irq_set_resp rmIrqResp;

rmIrqReq.valid_params = 0U;
rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_ID_VALID;
rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID;
rmIrqReq.global_event = 0U;

rmIrqReq.src_id = TISCI_DEV_GPIO1;

rmIrqReq.src_index = TISCI_BANK_SRC_IDX_BASE_GPIO1 + (uint16_t) GPIO_GET_BANK_INDEX(interrupt_source_index);
rmIrqReq.dst_id = TISCI_DEV_R5FSS0_CORE0;

/* The parameter router_output_index is a macro from <drivers/hw_include/cslr_soc.h>, one of
* CSLR_R5FSS0_CORE0_INTR_MAIN_GPIOMUX_INTROUTER0_OUTP_<0..7>. Note that calling this function
* more than one time for GPIO pins within the same bank causes the call to Sciclient_rmIrqSet()
* to fail. This leads me to believe that GPIO interrupt routing can only take place on the
* bank level, not the pin level. */
rmIrqReq.dst_host_irq = router_output_index;
rmIrqReq.ia_id = 0U;
rmIrqReq.vint = 0U;
rmIrqReq.vint_status_bit_index = 0U;
rmIrqReq.secondary_host = TISCI_MSG_VALUE_RM_UNUSED_SECONDARY_HOST;

retVal = Sciclient_rmIrqSet(&rmIrqReq, &rmIrqResp, SystemP_WAIT_FOREVER);
if(0 != retVal)
{
DebugP_log("[Error] Sciclient event config failed for GPIO pin index %ld\r\n", interrupt_source_index);
DebugP_assert(FALSE);
}

return;
}

SysConfig 配置以 zip 文件形式附加。

非常感谢-意识到这一局限性、找到可行的解决方案将会容易得多。

此外、您还可以参考类似的主题：

https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1184311/faq-mcu-plus-sdk-am263x-configuring-gpio-interrupts/4460313?tisearch=e2e-sitesearch&keymatch=FAQ%2525252525252520interrupts%2525252525252520am263#4460313

Br、

Shaunak