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https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/942627/cdclvc1104-question-about-cdclvc1104-output
您好、专家、
CDCLVC1104是否会在运行期间错过前几个脉冲？ 如下图所示。
我不希望缓冲器错过时钟脉冲。 我希望输出端的脉冲延迟一定的传播延迟、如电气特性中所述。
此致、 通道
