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https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/749505/lmk00301-schematic-review
大家好、
请帮助您仔细阅读 LMK00301的原理图设计吗？ 特别是对于输出引脚9和10、它是 HCSL 至 LVDS 和输入 clkin0引脚。 谢谢你。
原理图看起来正常。
Alan
