[参考译文] CDCE421A：CAN&#39；t 通过 SDATA 与 CDCE421A 通信

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Other Parts Discussed in Thread: CDCE421A, LMK61E2

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https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/1277633/cdce421a-can-t-communicate-with-cdce421a-via-sdata

器件型号：CDCE421A
主题中讨论的其他器件： LMK61E2

我无法让 CDCE421A 对通过 SDATA 执行的任何命令做出反应。

我正在使用 RP2040微控制器上的自定义 PIO 编程来处理脉冲和计时、这根据在输出上看到的结果效果很好。

PIO 编码如下：

.program cdce421a
.side_set 1 opt

.define public T1 2
.define public T2 6
.define public T3 2

pull_data:
    pull block
    out y, 4
bitloop:
    jmp !y    pull_data  side 0 [T3 - 2]; Side-set still takes place when instruction stalls
    out x, 1             
    jmp !x    do_zero    side 1 [T1 - 1]; Branch on the bit we shifted out. Positive pulse
do_one:
    jmp y--   bitloop    side 1 [T2 - 1] ; Continue driving high, for a long pulse
do_zero:
    jmp y--   bitloop    side 0 [T2 - 1] ; Or drive low, for a short pulse

% c-sdk {
#include "hardware/clocks.h"

static inline void cdce421a_program_init(PIO pio, uint sm, uint offset, uint pin, float freq) {

    pio_gpio_init(pio, pin);
    pio_sm_set_consecutive_pindirs(pio, sm, pin, 1, true);

    pio_sm_config c = cdce421a_program_get_default_config(offset);
    sm_config_set_sideset_pins(&c, pin);
    sm_config_set_out_shift(&c, false, false, 32);
    //sm_config_set_fifo_join(&c, PIO_FIFO_JOIN_TX);

    int cycles_per_bit = cdce421a_T1 + cdce421a_T2 + cdce421a_T3;
    float div = clock_get_hz(clk_sys) / (freq * cycles_per_bit);
    sm_config_set_clkdiv(&c, div);

    pio_sm_init(pio, sm, offset, &c);
    pio_sm_set_enabled(pio, sm, true);
}

根据数据表、在主 c 文件中、它的初始化频率为70kHz：

cdce421a_program_init(pio, sm, offset, CDCE421A_PIN, 70000);

发送的数据以位为单位、以用作 PIO ASM 中的计数器并在 OSR 中左移。

static void cdce421a_write(uint32_t data, uint32_t bits) {
    pio_sm_put_blocking(pio, sm, (data << (32 - bits - 4)) | (bits << 28));
}

我已经相应地定义了数据：

#define ENTER_PROG_MODE         cdce421a_write(0b001100,6)
#define READBACK_MODE           cdce421a_write(0b111011,6)
#define WRITE_WORD_0            cdce421a_write(VCO_SEL_VCO1 | PRESCALER_DIV_BY_5 | OUTPUT_DIV_BY_8 | DRIVER_SEL_LVDS | TITEST1 ,11)
#define WRITE_WORD_1_DEFAULT    cdce421a_write(0x4FA,11)
#define WRITE_WORD_2_DEFAULT    cdce421a_write(0x2C0,11)
#define WRITE_WORD_3_DEFAULT    cdce421a_write(0x61E,11)
#define WRITE_WORD_4_DEFAULT    cdce421a_write(0x101,11)
#define WRITE_WORD_5_DEFAULT    cdce421a_write(0x500,11)
#define EXIT_PROG_MODE          cdce421a_write(0x7FF,11)
#define PROG_EEPROM             cdce421a_write(0x7F0,11)
#define EXIT_PROG_EEPROM        cdce421a_write(0x700,11)

读回模式波形如下所示：