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https://e2e.ti.com/support/data-converters-group/data-converters/f/data-converters-forum/1031769/ads4222-pcb-trace-impedance-requirement-for-clock-input-lvds
我假设该时钟输入 PCB 迹线也需要100欧姆差分阻抗匹配。 (LVDS 时钟)
请确认。
小强
没错。
此致、
Jim
