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[参考译文] MSP430F2618:看门狗未复位 MCU

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请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

https://e2e.ti.com/support/microcontrollers/msp-low-power-microcontrollers-group/msp430/f/msp-low-power-microcontroller-forum/1055847/msp430f2618-watchdog-not-resetting-the-mcu

器件型号:MSP430F2618

您好!
是否存在看门狗卡住时无法重新启动 MCU 的边沿情况?
我要求的原因是、我们的器件在某种奇怪的状态下锁定、看门狗不会重启。
当器件最终处于此状态时、如果我们在 Code Composer Studio 中暂停、它看起来好像 PC 寄存器没有更改其值、而它停留在上的行似乎位于 watchdog_refresh() on 内  
WDTCTL = WDTPW + WDTNMI + WDTTMSEL + WDTCNTCL + WDTSSEL;

有时、它会在几个小时内卡住、有时在几天内卡住、但当存在大量中断时、它的发生速度似乎更快-例如通过 UART 接收数据。 如果器件正在处理另一个中断、WDT 能否复位器件? 我们是否可以采取措施来避免这种情况?

/**
 * Initialize Watchdog
 */
inline void watchdog_init()
{
    // WDTPW - Enter password (without password device will reset)
    // WDTHOLD = 0 - Watchdog timer+ is not stopped
    // WDTNMIES = 0 - This bit selects the interrupt edge for the NMI interrupt when WDTNMI = 1
    // WDTNMI = 1 - NMI function
    // WDTTMSEL = 0 - Watchdog mode
    // WDTCNTCL = 1 - Watchdog timer+ counter clear.
    // WDTSSEL = 1 - ACLK set at 12kHz (from 4kHz to 22kHz - internal oscillator) see Clk_init()
    // WDTISx = 00 - Watchdog clock source /32768 ->  ~ 2.7s [1.5s - 8.2s]
    WDTCTL = WDTPW + WDTNMI + WDTTMSEL + WDTCNTCL + WDTSSEL;

    // NMI interrupt enable. This bit enables the NMI interrupt.
    IE1 |=  NMIIE;
    IE1 |=  WDTIE;
}

/**
 * Refreshes watchdog.
 */
inline void watchdog_refresh()
{
    WDTCTL = WDTPW + WDTNMI + WDTTMSEL + WDTCNTCL + WDTSSEL;
}

inline void watchdog_stop()
{
    WDTCTL = WDTPW + WDTHOLD;
}

void Clk_init()
{
    BCSCTL1 = CALBC1_1MHZ;
    BCSCTL1 |= DIVA_0;          // Divider for ACLK /1

    DCOCTL =  CALDCO_1MHZ;      // DCO = 1 MHz
    BCSCTL2 |= DIVS_1;          // SMCLK = DCO/2 -> 500 kHz

    // Low-frequency clock select and LFXT1 range select. These bits select between LFXT1 and VLO when XTS = 0,
    // and select the frequency range for LFXT1 when XTS = 1
    BCSCTL3 |= LFXT1S1;

    IFG1 = 0;
    /* Wait for the crystal to settle. */
    do
    {
        /* Clear the fault flag. */
        IFG1 &= ~OFIFG;
    }
    while (IFG1 & OFIFG);
}