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[参考译文] MSP430F2272:I2C 主机接收开始条件持续触发 TX ISR

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Other Parts Discussed in Thread: MSP430F2272

请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

https://e2e.ti.com/support/microcontrollers/msp-low-power-microcontrollers-group/msp430/f/msp-low-power-microcontroller-forum/997409/msp430f2272-i2c-master-receive-start-condition-continuously-triggers-tx-isr

器件型号:MSP430F2272

您好 MSP430论坛。

正如标题所述、在一个 START 条件之后、当 MSP 处于主控模式并且接收到一个来自从器件的消息时、代码执行会一直进入 TX ISR、即使 TX 中断被禁用(IE2 = UCB0RXIE)。 当处于 主控模式且正在传输消息时、一切都正常!

在主器件侧有一个 MSP430F2272、在从器件侧有一个 SHT30-DIS。

下面是我的代码片段:

//-----------------------------------------------------------------------
// PORT3 configuration
//
P3REN       &= ~(I2C_SDA | I2C_SCL);    //I2C_SDA == 0x02, I2C_SCL == 0x04
P3DIR       |=  (I2C_SCL);
P3SEL       |=  (I2C_SDA | I2C_SCL);

//-----------------------------------------------------------------------
// I2C configuration
//
UCB0I2CSA = SHT3X_I2C_ADDRESS;      // I2C slave Address.  The I2CSAx bits contain the slave address of the    ;
UCB0CTL1 |= UCTR;                   // UCTR=1 => Transmit Mode (R/W bit = 0)
IFG2 &= ~(UCB0TXIFG | UCB0RXIFG);   // Clear Interrupt flags
IE2 &= ~UCB0RXIE;                   // disable Receive ready interrupt
IE2 |= UCB0TXIE;                    // enable Transmit ready interrupt

//-----------------------------------------------------------------------
// Send Measurement command to slave device
//
//Send START condition
UCB0CTL1 |= UCTXSTT;                        // Send start. Transmit START condition in master mode.
__delay_cycles(5);

//Send MSB
IFG2 &= ~UCB0TXIFG;
UCB0TXBUF = SHT3X_MEAS_TEMP_MSB;            // Send MSB to device
__bis_SR_register(LPM3_bits + GIE);         // Wait till Tx interrupt occur

//Send LSB
IFG2 &= ~UCB0TXIFG;
UCB0TXBUF = SHT3X_MEAS_TEMP_LSB;            // Send LSB to device
__bis_SR_register(LPM3_bits + GIE);         // Wait till Tx interrupt occur

//Send STOP condition
UCB0CTL1 |= UCTXSTP;                        // Send STOP condition to slave knows that data transfer ended
while((UCB0CTL1 & UCTXSTP));                // 2 ensure STOP was send

//Put Master in RECEIVE status
UCB0CTL1 &= ~UCTR;                          // UCTR=0 => Receive Mode (R/W bit = 1)
IFG2 &= ~(UCB0RXIFG | UCB0TXIFG);           //UCB0RXIFG is set when UCB0RXBUF has received a complete character
IE2 &= ~(UCB0TXIE);                         // disable Transmit ready interrupt
IE2 |= UCB0RXIE;                             // enable Receive ready interrupt

//Send START condition to slave send data
//Slave clock streching is enabled
UCB0CTL1 |= UCTXSTT;                        // Send start. Transmit START condition in master mode.
__delay_cycles(5);

//Just a loop 2 know when NACK & STOP should be sent
for(i=BYTES2RECEIVE; i > 0; i--)
{
    __bis_SR_register(LPM3_bits + GIE);

    if(!(i-1))
    {
        UCB0CTL1 |= UCTXNACK;               // Send NACK condition
        __delay_cycles(5);
        UCB0CTL1 |= UCTXSTP;                // Send STOP condition to slave knows that data transfer ended
        while((UCB0CTL1 & UCTXSTP));
    }
}

//TRANSMIT ISR
#pragma vector=USCIAB0TX_VECTOR
__interrupt void USCIABTX_ISR(void)
{
    if((IFG2 & UCA0TXIFG))
        IFG2 &= ~UCA0TXIFG;
    if((IFG2 & UCB0TXIFG))
        IFG2 &= ~UCB0TXIFG;
    __bic_SR_register_on_exit(LPM3_bits); // EXIT LPM3

}

//RECEIVE ISR

#pragma vector=USCIAB0RX_VECTOR
__interrupt void USCIABRX_ISR(void)
{
    if((IFG2 & UCB0RXIFG))
    {
        RXData[i-1] = UCB0RXBUF;             // Get RX data
        IFG2 &= ~UCB0RXIFG;
    }
    __bic_SR_register_on_exit(LPM3_bits);    // Exit LPM3
}

我能够在示波器上看到应该发送和接收到从器件的数据。 一切都很好、除了我的程序 不断进入 和退出 TX ISR。 当我暂停程序执行并禁用 RX 中断时、不会进入 TX ISR。

有什么想法吗?

提前感谢!

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    在 I2C 模式下(仅限)、F2 USCI 对 RXIFG 和 TXIFG 都使用"TX" ISR、而"RX" ISR 则用于其他所有操作。 [参考用户指南(SLAU144J)第17.3.7.4节。 请注意示例17-1和17-2、其中显示、如果您将另一个 USCI 用于非 I2C、它可能会有一些不一致。]