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[参考译文] MSP430FR2355:修改示例 DCO 时钟频率时出现问题

Guru**** 2388090 points
Other Parts Discussed in Thread: MSP430FR2355, UNIFLASH
请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

https://e2e.ti.com/support/microcontrollers/msp-low-power-microcontrollers-group/msp430/f/msp-low-power-microcontroller-forum/1206915/msp430fr2355-trouble-modifying-example-dco-clock-frequency

器件型号:MSP430FR2355
主题中讨论的其他器件: UNIFLASH

您好!

我正在尝试使用 DCO 将 MSP430FR2355设置为20MHz。 我从8MHz DCO 示例工程开始、修改了如下三行(第79、89、92行):

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//******************************************************************************
//  MSP430FR235x Demo - Configure MCLK for 8MHz sourced from DCO.
//
//  Description: Default DCODIV is MCLK and SMCLK source.
//  By default, FR235x select XT1 as FLL reference.
//  If XT1 is present, the XIN and XOUT pin needs to configure.
//  If XT1 is absent, switch to select REFO as FLL reference automatically.
//  XT1 is considered to be absent in this example.
//  f(DCOCLK) = 2^FLLD * (FLLN+1) * (fFLLREFCLK / n).
//  FLLD = 0, FLLN =243, n=1, DIVM =1, f(DCOCLK) = 2^0 * (243+1)*32768Hz = 8MHz,
//  f(DCODIV) = (243+1)*32768Hz = 8MHz,
//  ACLK = default REFO ~32768Hz, SMCLK = MCLK = f(DCODIV) = 8MHz.
//  Toggle LED to indicate that the program is running.
//
//           MSP430FR235x
//         ---------------
//     /|\|               |
//      | |               |
//      --|RST            |
//        |          P1.0 |---> LED
//        |               |
//        |               |
//        |          P1.1 |---> ACLK  = 32768Hz
//
//
//   Darren Lu
//   Texas Instruments Inc.
//   Oct. 2016
//   Built with IAR Embedded Workbench v6.50 & Code Composer Studio v6.2
//******************************************************************************
#include <msp430.h>

void Software_Trim();                       // Software Trim to get the best DCOFTRIM value
//#define MCLK_FREQ_MHZ 8                     // MCLK = 8MHz
#define MCLK_FREQ_MHZ 20                     // MCLK = 8MHz


int main(void)
{
    WDTCTL = WDTPW | WDTHOLD;               // Stop watchdog timer

    __bis_SR_register(SCG0);                // disable FLL
    CSCTL3 |= SELREF__REFOCLK;              // Set REFO as FLL reference source
//    CSCTL1 = DCOFTRIMEN_1 | DCOFTRIM0 | DCOFTRIM1 | DCORSEL_3;// DCOFTRIM=3, DCO Range = 8MHz
    CSCTL1 = DCOFTRIMEN_1 | DCOFTRIM0 | DCOFTRIM1 | DCORSEL_6;// DCOFTRIM=6, DCO Range = 20MHz

//    CSCTL2 = FLLD_0 + 243;                  // DCODIV = 8MHz
    CSCTL2 = FLLD_0 + 609;                  // DCODIV = 20MHz
    __delay_cycles(3);
    __bic_SR_register(SCG0);                // enable FLL
    Software_Trim();                        // Software Trim to get the best DCOFTRIM value


    CSCTL4 = SELMS__DCOCLKDIV | SELA__REFOCLK; // set default REFO(~32768Hz) as ACLK source, ACLK = 32768Hz
                                            // default DCODIV as MCLK and SMCLK source

    P1DIR |= BIT0 | BIT1;                   // set ACLK and LED pin as output
    P1SEL1 |= BIT1;                         // set ACLK pin as second function

    PM5CTL0 &= ~LOCKLPM5;                   // Disable the GPIO power-on default high-impedance mode
                                            // to activate previously configured port settings

    while(1)
    {
        P1OUT ^= BIT0;                      // Toggle P1.0 using exclusive-OR
        __delay_cycles(10000000);           // Delay for 10000000*(1/MCLK)=1.25s
    }
}

void Software_Trim()
{
    unsigned int oldDcoTap = 0xffff;
    unsigned int newDcoTap = 0xffff;
    unsigned int newDcoDelta = 0xffff;
    unsigned int bestDcoDelta = 0xffff;
    unsigned int csCtl0Copy = 0;
    unsigned int csCtl1Copy = 0;
    unsigned int csCtl0Read = 0;
    unsigned int csCtl1Read = 0;
    unsigned int dcoFreqTrim = 3;
    unsigned char endLoop = 0;

    do
    {
        CSCTL0 = 0x100;                         // DCO Tap = 256
        do
        {
            CSCTL7 &= ~DCOFFG;                  // Clear DCO fault flag
        }while (CSCTL7 & DCOFFG);               // Test DCO fault flag

        __delay_cycles((unsigned int)3000 * MCLK_FREQ_MHZ);// Wait FLL lock status (FLLUNLOCK) to be stable
                                                           // Suggest to wait 24 cycles of divided FLL reference clock
        while((CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1)) && ((CSCTL7 & DCOFFG) == 0));

        csCtl0Read = CSCTL0;                   // Read CSCTL0
        csCtl1Read = CSCTL1;                   // Read CSCTL1

        oldDcoTap = newDcoTap;                 // Record DCOTAP value of last time
        newDcoTap = csCtl0Read & 0x01ff;       // Get DCOTAP value of this time
        dcoFreqTrim = (csCtl1Read & 0x0070)>>4;// Get DCOFTRIM value

        if(newDcoTap < 256)                    // DCOTAP < 256
        {
            newDcoDelta = 256 - newDcoTap;     // Delta value between DCPTAP and 256
            if((oldDcoTap != 0xffff) && (oldDcoTap >= 256)) // DCOTAP cross 256
                endLoop = 1;                   // Stop while loop
            else
            {
                dcoFreqTrim--;
                CSCTL1 = (csCtl1Read & (~DCOFTRIM)) | (dcoFreqTrim<<4);
            }
        }
        else                                   // DCOTAP >= 256
        {
            newDcoDelta = newDcoTap - 256;     // Delta value between DCPTAP and 256
            if(oldDcoTap < 256)                // DCOTAP cross 256
                endLoop = 1;                   // Stop while loop
            else
            {
                dcoFreqTrim++;
                CSCTL1 = (csCtl1Read & (~DCOFTRIM)) | (dcoFreqTrim<<4);
            }
        }

        if(newDcoDelta < bestDcoDelta)         // Record DCOTAP closest to 256
        {
            csCtl0Copy = csCtl0Read;
            csCtl1Copy = csCtl1Read;
            bestDcoDelta = newDcoDelta;
        }

    }while(endLoop == 0);                      // Poll until endLoop == 1

    CSCTL0 = csCtl0Copy;                       // Reload locked DCOTAP
    CSCTL1 = csCtl1Copy;                       // Reload locked DCOFTRIM
    while(CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1)); // Poll until FLL is locked
}

不过、当我这么做时、我可以改变时钟、但我无法再对 MSP430进行编程。 我看到了 布鲁斯的以下建议:

https://e2e.ti.com/support/microcontrollers/msp-low-power-microcontrollers-group/msp430/f/msp-low-power-microcontroller-forum/1040720/msp-exp430fr2355-i-can-t-load-even-a-simple-program-without-a-verification-error

我尝试在"Program/Memory Load"下设置"No verification"、但这可以防止我收到的错误(数据验证错误)底层程序没有被刷新。 我发现可以通过 在 uniflash 中执行批量擦除和硬复位来解决此问题、但我希望能够从 CCS 进行闪存。 我的代码中是否有什么错误 使时钟更改为20MHz 后 MSP430无法再闪存?

谢谢!

Connor

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    我看不到任何设置 NWAITS 的内容[Ref data sheet (SLASEC4D) Sec 5.3]。 尝试添加:

    >   FRCTL0 = FRCTLPW | NWAITS_2;  // 2WS 对于>16MHz

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    谢谢!