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器件型号：TRF7962A 主题中讨论的其他器件： TRF7964A、 TRF7970A
您好！
我正在研究一个项目、以实现基于 trf7962A 芯片的 ISO15693标签读取和写入数据。 我的硬件板与 TRF7960EVM (sloc251)的示例代码相匹配。 我已将示例代码下载到电路板中。 当我使用 从 TI 网站下载的 TRF7960EVMGUI 测试15693的库存读写时、此功能运行良好。 那么、现在我要学习该示例代码。
我在学习时发现了一些奇怪的问题。 我在 第11行添加了一行代码"iso_control[0]= iso_control；"、因为我认为如果没有设置任何值、缓冲区"iso_control[4]将是随机的。 不可理解 的是、当我添加这行代码时、读写操作停止工作。 删除它、它再次运行良好。 我仔细检查 后发现没有错误。
为什么添加此代码后它不起作用？ 需要帮助。
以下是代码的一部分：
u08_t
HostRequestCommand(u08_t *pbuf, u08_t length, u08_t broken_bits, u08_t no_crc)
{
u08_t index = 0, j = 0;
u08_t iso_control[4];
u16_t tx_timeout = 1, rx_timeout = 1;
tx_timeout = length / 10 + 3;
iso_control[0] = ISO_CONTROL; // i add this
Trf796xReadSingle(iso_control, 1);
iso_control[0] &= 0x1F;
if(iso_control[0] < 8) // ISO15693
{
tx_timeout = tx_timeout * 1; //ORIGINAL VALUE = 4
rx_timeout = rx_timeout * 1;
if((iso_control[0] < 2) || (iso_control[0] == 3) || (iso_control[0] == 4)) // low bit rate
{
tx_timeout = tx_timeout * 4; //ORIGINAL VALUE = 4
rx_timeout = rx_timeout * 4;
}
if(iso_control[0] % 2 == 1) // 1 out of 256
{
tx_timeout = tx_timeout * 8; //ORIGINAL VALUE = 8
rx_timeout = rx_timeout * 1; //ORIGINALLY NOT PRESENT
}
}
rxtx_state = length; // rxtx_state extern variable is the main transmit counter
*pbuf = 0x8f;
if(no_crc == 1)
{
*(pbuf + 1) = 0x90; // buffer setup for FIFO writing WITHOUT CRC
}
else
{
*(pbuf + 1) = 0x91; // buffer setup for FIFO writing WITH CRC
}
*(pbuf + 2) = 0x3d;
*(pbuf + 3) = rxtx_state >> 4;
*(pbuf + 4) = (rxtx_state << 4) | broken_bits;
if(length > 12)
{
length = 12;
}
if(length == 0x00 && broken_bits != 0x00)
{
length = 1;
rxtx_state = 1;
}
Trf796xRawWrite(pbuf, length + 5); // send the request using RAW writing
// Write 12 bytes the first time you write to FIFO
IRQ_CLR; // PORT2 interrupt flag clear
IRQ_ON;
rxtx_state = rxtx_state - 12;
index = 17;
i_reg = 0x01;
while(rxtx_state > 0)
{
irq_flag = 0x00;
while(irq_flag == 0x00) // wait for interrupt
{
}
if(rxtx_state > 9) // the number of unsent bytes is in the rxtx_state extern
{
length = 10; // count variable has to be 10 : 9 bytes for FIFO and 1 address
}
else if(rxtx_state < 1)
{
break; // return from interrupt if all bytes have been sent to FIFO
}
else
{
length = rxtx_state + 1; // all data has been sent out
} // if
buf[index - 1] = FIFO; // writes 9 or less bytes to FIFO for transmitting
Trf796xWriteCont(&buf[index - 1], length);
rxtx_state = rxtx_state - 9; // write 9 bytes to FIFO
index = index + 9;
}
rxtx_state = 1; // the response will be stored in buf[1] upwards
j = 0;
while((i_reg == 0x01) && (j <= tx_timeout))
{
COUNT_VALUE = COUNT_1ms * 2; // for TIMEOUT
START_COUNTER; // start timer up mode
irq_flag = 0x00;
while(irq_flag == 0x00)
{
}
j++;
}
i_reg = 1;
if( (((buf[5] & BIT6) == BIT6) && ((buf[6] == 0x21) || (buf[6] == 0x22)|| (buf[6] == 0x23)|| (buf[6] == 0x24) ||
(buf[6] == 0x27)|| (buf[6] == 0x28) || (buf[6] == 0x29)|| (buf[6] == 0x2A)))
|| (buf[5] == 0x00 && ((buf[6] & 0xF0) == 0x20 || (buf[6] & 0xF0) == 0x30 || (buf[6] & 0xF0) == 0x40))
)
{
McuDelayMillisecond(30); //originally 20mSec, 100mSec seems to much
Trf796xReset(); //took out to see if low data rate RMB could improve
McuDelayMillisecond(30);
Trf796xTransmitNextSlot();
}
j = 0;
while((i_reg == 0x01) && (j <= rx_timeout))
{
COUNT_VALUE = COUNT_1ms * 14; // for TIMEOUT original value 14
START_COUNTER; // start timer up mode
irq_flag = 0x00;
while(irq_flag == 0x00)
{
}
j++;
}
...
}
此致
Xubo
