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28377SPZPT上SCIA管脚GPIO65上的TX信号示波器检测不到???



基于TI28377SPZPT的Demo板,结合Controlsuit例程sci_loopback_interrupts_cpu01工程,只是在SCIA初始化的过程中将RX管脚定义为GPIO64,TX管脚定义为GPIO65,原先的数值为28、29,如下为更改后的代码:

GPIO_SetupPinMux(64, GPIO_MUX_CPU1, 1);
GPIO_SetupPinOptions(64, GPIO_INPUT, GPIO_PUSHPULL);
GPIO_SetupPinMux(65, GPIO_MUX_CPU1, 1);
GPIO_SetupPinOptions(65, GPIO_OUTPUT, GPIO_ASYNC);

可是编译烧录测试时在GPIO65上示波器检测不到任何数据信号,在程序中发送数据的SciaRegs.SCITXBUF.all一直都有更新,不知道自己哪里配置的不对了?

另外,将SCIFIFO初始化的代码做如下更改:

SciaRegs.SCICCR.bit.LOOPBKENA = 0; // no loop back

SciaRegs.SCIFFTX.bit.SCIFFENA = 1;//enable FIFO mode.
SciaRegs.SCIFFTX.bit.TXFFST = 0;
SciaRegs.SCIFFTX.bit.TXFFINT = 1;
SciaRegs.SCIFFTX.bit.TXFFINTCLR = 1;
SciaRegs.SCIFFTX.bit.TXFFIENA = 1;
SciaRegs.SCIFFTX.bit.TXFFIL = 0;

SciaRegs.SCIFFRX.bit.RXFFOVF = 0;
SciaRegs.SCIFFRX.bit.RXFFOVRCLR = 0;
SciaRegs.SCIFFRX.bit.RXFFST = 0;
SciaRegs.SCIFFRX.bit.RXFFINT = 1;
SciaRegs.SCIFFRX.bit.RXFFINTCLR = 0;
SciaRegs.SCIFFRX.bit.RXFFIENA = 1;
SciaRegs.SCIFFRX.bit.RXFFIL = 16;

SciaRegs.SCIFFCT.all = 0x00;

SciaRegs.SCICTL1.all = 0x0023; // Relinquish SCI from Reset
//SciaRegs.SCIFFTX.bit.TXFIFOXRESET = 1;
SciaRegs.SCIFFTX.bit.TXFIFORESET = 1;
SciaRegs.SCIFFRX.bit.RXFIFORESET = 1;

编译烧录程序后再GPIO65的管脚上也还是没有TX信号出来,可实际上明明发送中断函数进去了啊??请高手指教了。。