HVLLC工程中使用的数字电源库汇编代码文件PWMDRV_LLC_1ch_UpCntDB_Comp.asm中以下代码:
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PWMDRV_LLC_1ch_UpCntDB_Compl .macro
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MOVW DP, #_PWMDRV_LLC_1ch_UpCntDB_Compl_Duty2 ; load DP for net pointer
MOVL XAR0, @_PWMDRV_LLC_1ch_UpCntDB_Compl_Duty2 ; Load net pointer address to XAR0
MOVL XAR1, @_PWMDRV_LLC_1ch_UpCntDB_Compl_Period2 ; Load net pointer address to XAR1
MOVL ACC, *XAR1
SFR ACC, #14 ; ACC>>14: AL = Period (Q10)
MOVW DP, #_EPwm2Regs.TBPRD
MOV @_EPwm2Regs.TBPRD, AL ; Update period register
MOVL XT, @_EPwm2Regs.TBPRD ; 注意这里是MOVL指令,即XT=TBPRD<<16
QMPYL ACC, XT, *XAR0 ; ACC = (I16Q16) * (I8Q24) = (I24Q40): upper 32-bits -> ACC = (I24Q8)
SFR ACC, #8 ; ACC>>8: AL = Duty*Period (Q16)
SUB @T, AL ; T = Period - Duty*Period
MOVW DP, #_EPwm2Regs.CMPA
MOV @_EPwm2Regs.CMPA.half.CMPA, T ; Update CMPA
ROR ACC ; AL = Duty*Period/2
SUB ACC, #13 ; compensate for 1st sample bug
ADD @T, AL
MOVW DP, #_EPwm2Regs.CMPB
MOV @_EPwm2Regs.CMPB, T ; Update CMPB = Duty midpoint
MOVL ACC, *XAR1
SFR ACC, #14 ; ACC>>14: AL = Period (Q10)
MOVW DP, #_EPwm2Regs.DBFED
SUB AL, @_EPwm2Regs.DBFED ; use FED value to create Falling Edge Margin (advance falling edge)
MOVW DP, #_EPwm2Regs.TBPRD
MOV @_EPwm2Regs.TBPRD, AL ; Update period register (with FEM)
.endm
我的疑问是:
(1)EPwm的相关寄存器,如TBPRD等不是EALLOW保护的吗?这里并没有体现。我把这段代码在CCS3.3中实际在芯片仿真单步执行时发现TBPRD寄存器并没有用计算出的值更新(写不进去),是否与EALLOW有关?(确认计算结果是对的,只是写不进去而已)
(2)请帮忙确认一下最终的计算结果及解答疑问。
CMPA = period - duty *period
CMPB= 0.5*period*duty-13+period-duty*period=period-0.5*period*duty-13,注释说是第一次的采样bug补偿,怎么理解?
TBPRD = period - FED,注释说使用FED来生成下降沿margin,怎么理解?