我需要兩個ePWM波形
ePWM1可放大縮小，但ePWM2須維持固定大小，並與ePWM1同時關斷
兩個訊號Duty不同，但在同一時間關斷
因為令 EPwm2Regs.CMPA.half.CMPA = Vc1-0.1*1499; (EPwm2中GPIO3是GPIO2的反向訊號)
因此目前是 ePWM1 GPIO0為主要訊號，可使ePWM2 GPIO3可在GPIO0關斷前導通一段時間，但GPIO3在GPIO0關斷時仍繼續導通
需要的是GPIO3與GPIO0同時關斷
或者是能有甚麼方式可以控制這樣的訊號
#include "DSP28x_Project.h"
typedef struct
{
volatile struct EPWM_REGS *EPwmRegHandle;
Uint16 EPwm_CMPA_Direction;
Uint16 EPwm_CMPB_Direction;
Uint16 EPwmTimerIntCount;
Uint16 EPwmMaxCMPA;
Uint16 EPwmMinCMPA;
Uint16 EPwmMaxCMPB;
Uint16 EPwmMinCMPB;
}
EPWM_INFO;
void InitEpwm1(void);
__interrupt void adc_isr(void);
__interrupt void epwm_isr(void);
int count = 0;
int x = 0;
int S4DBR = 0;
Uint16 LoopCount;
Uint16 ConversionCount;
float Voltage1;
float VoltageFB;
float Vcmd;
float Verror;
float Verror1;
float Kp;
float Ki;
float Vc;
float Vc1;
float Vc_last;
float DeadTime;
float Td;
float D0DT;
float S34DB;
float S3Duty;
#define EPWM1_TIMER_TBPRD 1499
#define EPWM1_MAX_CMPA 1499
#define EPWM1_MIN_CMPA 700
#define EPWM2_TIMER_TBPRD 1499
#define EPWM2_MAX_CMPA 1499
#define EPWM2_MIN_CMPA 700
#define EPWM3_TIMER_TBPRD 1499
#define EPWM3_MAX_CMPA 1499
#define EPWM3_MIN_CMPA 700
main()
{
InitSysCtrl();
EALLOW;
#if (CPU_FRQ_150MHZ)
#define ADC_MODCLK 0x3
#endif
#if (CPU_FRQ_100MHZ)
#define ADC_MODCLK 0x2
#endif
EDIS;
EALLOW;
SysCtrlRegs.HISPCP.all = ADC_MODCLK;
EDIS;
InitEPwm1Gpio();
InitEPwm2Gpio();
InitEPwm3Gpio();
DINT;
InitPieCtrl();
IER = 0x0000;
IFR = 0x0000;
InitPieVectTable();
EALLOW;
PieVectTable.ADCINT = &adc_isr;
PieVectTable.EPWM1_INT = &epwm_isr;
EDIS;
InitAdc();
InitEpwm1();
IER |= M_INT1;
IER |= M_INT3;
PieCtrlRegs.PIEIER3.bit.INTx1 = 1;
PieCtrlRegs.PIEIER3.bit.INTx2 = 1;
PieCtrlRegs.PIEIER3.bit.INTx3 = 1;
PieCtrlRegs.PIEIER1.bit.INTx6 = 1;
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
SysCtrlRegs.PCLKCR1.bit.EPWM1ENCLK = 1;
SysCtrlRegs.PCLKCR1.bit.EPWM2ENCLK = 1;
SysCtrlRegs.PCLKCR1.bit.EPWM3ENCLK = 1;
EDIS;
EINT;
ERTM;
//////////////////////////////////////////////////////
LoopCount = 0;
ConversionCount = 0;
Vcmd = 3100;
Kp = 0.75;
Ki = 0.005;
S34DB = 0.15;
DeadTime = 40;
S4DBR = 0;
count = 0;
x = 0;
//////////////////////////////////////////////////////
for(;;)
{
DELAY_US(5000);
if(x == 0)
{
count++;
if(count == 500)
{
x = 1;
}
}
else
{
count--;
if(count == 0)
{
x = 0;
}
}
}
AdcRegs.ADCMAXCONV.all = 0x0001;
AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x0;
//AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x2;
AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1 = 1;
AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1;
EPwm1Regs.ETSEL.bit.SOCAEN = 1;
EPwm1Regs.ETSEL.bit.SOCASEL = 4;
EPwm1Regs.ETPS.bit.SOCAPRD = 1;
EPwm1Regs.TBPRD = EPWM1_TIMER_TBPRD;
EPwm1Regs.TBCTL.bit.CTRMODE = 0;
EPwm2Regs.ETSEL.bit.SOCAEN = 1;
EPwm2Regs.ETSEL.bit.SOCASEL = 4;
EPwm2Regs.ETPS.bit.SOCAPRD = 1;
EPwm2Regs.TBPRD = EPWM1_TIMER_TBPRD;
EPwm2Regs.TBCTL.bit.CTRMODE = 0;
EPwm3Regs.ETSEL.bit.SOCAEN = 1;
EPwm3Regs.ETSEL.bit.SOCASEL = 4;
EPwm3Regs.ETPS.bit.SOCAPRD = 1;
EPwm3Regs.TBPRD = EPWM1_TIMER_TBPRD;
EPwm3Regs.TBCTL.bit.CTRMODE = 0;
EPwm1Regs.TBCTL.bit.PHSEN = TB_ENABLE;
EPwm2Regs.TBCTL.bit.PHSEN = TB_ENABLE;
EPwm3Regs.TBCTL.bit.PHSEN = TB_ENABLE;
for(;;)
{
asm(" NOP");
LoopCount++;
}
}
__interrupt void adc_isr(void)
{
Voltage1 = AdcRegs.ADCRESULT0 >>4;
VoltageFB = ((float)Voltage1);
AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1;
AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1;
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
}
__interrupt void epwm_isr(void)
{
Vc = 1000;
Vc1 = Vc + count;
if(Vc1 >= EPWM1_MAX_CMPA)
{
Vc1 = EPWM1_MAX_CMPA;
}
if(Vc1 <= EPWM1_MIN_CMPA)
{
Vc1 = EPWM1_MIN_CMPA;
}
Verror1 = Verror;
Vc_last = Vc1;
EPwm1Regs.CMPA.half.CMPA = Vc1;
EPwm2Regs.CMPA.half.CMPA = Vc1-0.1*1499;
EPwm3Regs.CMPA.half.CMPA = Vc1;
EPwm1Regs.ETCLR.bit.INT = 1;
EPwm2Regs.ETCLR.bit.INT = 1;
EPwm3Regs.ETCLR.bit.INT = 1;
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
}
void InitEpwm1()
{
EALLOW;
GpioCtrlRegs.GPAPUD.bit.GPIO0 = 0;
GpioCtrlRegs.GPAPUD.bit.GPIO1 = 0;
GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1;
GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 1;
EDIS;
EPwm1Regs.TBPRD = EPWM1_TIMER_TBPRD;
EPwm1Regs.TBPHS.half.TBPHS = 0x0000;
EPwm1Regs.TBCTR = 0x0000;
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO;
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;
EPwm1Regs.TBCTL.bit.PHSEN = TB_ENABLE;
EPwm1Regs.TBCTL.bit.HSPCLKDIV = 0;
EPwm1Regs.TBCTL.bit.CLKDIV = 0;
EPwm1Regs.CMPCTL.bit.SHDWAMODE = 1;
EPwm1Regs.CMPCTL.bit.SHDWBMODE = 1;
EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
EPwm1Regs.AQCTLA.bit.CAU = 2;
EPwm1Regs.AQCTLA.bit.CAD = 1;
EPwm1Regs.AQCTLB.bit.CAU = 2;
EPwm1Regs.AQCTLB.bit.CAD = 1;
EPwm1Regs.AQCTLA.bit.ZRO = AQ_SET;
EPwm1Regs.AQCTLA.bit.CAU = AQ_CLEAR;
EPwm1Regs.AQCTLB.bit.ZRO = 2;
EPwm1Regs.AQCTLB.bit.CAU = 1;
EPwm1Regs.DBCTL.bit.IN_MODE = 2;
EPwm1Regs.DBCTL.bit.POLSEL = 2;
EPwm1Regs.DBCTL.bit.OUT_MODE = 3;
EPwm1Regs.DBRED = DeadTime;
EPwm1Regs.DBFED = DeadTime;
EPwm1Regs.ETSEL.bit.INTEN = 1;
EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;
EPwm1Regs.ETPS.bit.INTPRD = 1;
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
EDIS;
////////////////////////////////////////////////////////////////////////////////////////////////////
EALLOW;
GpioCtrlRegs.GPAPUD.bit.GPIO2 = 0;
GpioCtrlRegs.GPAPUD.bit.GPIO3 = 0;
GpioCtrlRegs.GPAMUX1.bit.GPIO2= 1;
GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 1;
EDIS;
EPwm2Regs.TBPRD = EPWM1_TIMER_TBPRD;
EPwm2Regs.TBPHS.half.TBPHS = 2;
EPwm2Regs.TBCTR = 0x0000;
EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO;
EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;
EPwm2Regs.TBCTL.bit.PHSEN = TB_ENABLE;
EPwm2Regs.TBCTL.bit.HSPCLKDIV = 0;
EPwm2Regs.TBCTL.bit.CLKDIV = 0;
EPwm2Regs.CMPCTL.bit.SHDWAMODE = 1;
EPwm2Regs.CMPCTL.bit.SHDWBMODE = 1;
EPwm2Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm2Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
EPwm2Regs.AQCTLA.bit.CAU = 2;
EPwm2Regs.AQCTLA.bit.CAD = 1;
EPwm2Regs.AQCTLB.bit.CAU = 2;
EPwm2Regs.AQCTLB.bit.CAD = 1;
EPwm2Regs.AQCTLA.bit.ZRO = AQ_SET;
EPwm2Regs.AQCTLA.bit.CAU = AQ_CLEAR;
EPwm2Regs.AQCTLB.bit.ZRO = 2;
EPwm2Regs.AQCTLB.bit.CAU = 1;
EPwm2Regs.DBCTL.bit.IN_MODE = 2;
EPwm2Regs.DBCTL.bit.POLSEL = 2;
EPwm2Regs.DBCTL.bit.OUT_MODE = 3;
EPwm2Regs.DBRED = DeadTime;
EPwm2Regs.DBFED = DeadTime;
////////////////////////////////////////////////////////////////////////////////////////////////////
EALLOW;
GpioCtrlRegs.GPAPUD.bit.GPIO4 = 0;
GpioCtrlRegs.GPAPUD.bit.GPIO5 = 0;
GpioCtrlRegs.GPAMUX1.bit.GPIO4= 1;
GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 1;
EDIS;
EPwm3Regs.TBPRD = EPWM1_TIMER_TBPRD;
EPwm3Regs.TBPHS.half.TBPHS = 2;
EPwm3Regs.TBCTR = 0x0000;
EPwm3Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO;
EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;
EPwm3Regs.TBCTL.bit.PHSEN = TB_ENABLE;
EPwm3Regs.TBCTL.bit.HSPCLKDIV = 0;
EPwm3Regs.TBCTL.bit.CLKDIV = 0;
EPwm3Regs.CMPCTL.bit.SHDWAMODE = 1;
EPwm3Regs.CMPCTL.bit.SHDWBMODE = 1;
EPwm3Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm3Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
EPwm3Regs.AQCTLA.bit.CAU = 2;
EPwm3Regs.AQCTLA.bit.CAD = 1;
EPwm3Regs.AQCTLB.bit.CAU = 2;
EPwm3Regs.AQCTLB.bit.CAD = 1;
EPwm3Regs.AQCTLA.bit.ZRO = AQ_SET;
EPwm3Regs.AQCTLA.bit.CAU = AQ_CLEAR;
EPwm3Regs.AQCTLB.bit.ZRO = 2;
EPwm3Regs.AQCTLB.bit.CAU = 1;
EPwm3Regs.DBCTL.bit.IN_MODE = 2;
EPwm3Regs.DBCTL.bit.POLSEL = 2;
EPwm3Regs.DBCTL.bit.OUT_MODE = 3;
EPwm3Regs.DBRED = DeadTime;
EPwm3Regs.DBFED = DeadTime;
}
