UCC21520的欠压恢复时间是多少?当UCC21520的VDDA或VDDB达到欠压恢复阈值后多久才会输出PWM?
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HI
见datasheet 第17页: 7.5 Power-up UVLO Delay to OUTPUT
Before the driver is ready to deliver a proper output state, there is a power-up delay from the UVLO rising edge to output and it is defined as tVCCI+ to OUT for VCCI UVLO (typically 40us) and tVDD+ to OUT for VDD UVLO (typically 50us).