BQ76930: 充电问题

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It looks like the design followed the basic structure of TIDA-01093 for a FET circuit.  The issue seems to be that they should have kept the Q31 of TIDA-01093 so that the charge gate voltage can fall with PACK- when a charger is applied.  As is, with the charger applied at a voltage greater than the battery and CHG_OUT low, the signal from the 12V logic chip which drives CHG_OUT can't go significantly below GND_B, perhaps -0.2V.  D42 and D44 will both be forward biased at perhaps 0.5V each putting the gate of the FET at about -0.6 to -1 V.  VGSTH of the FET is between 3 and 5 V, from the measurement about 3.65 V, so the FET will act as a source follower and the difference between the battery and charger will drop across the body diode of (Q42) and the charge FET (Q43) VGS.

Include the P-ch such as Q3 in figure 8 of the BQ76930 data sheet or Q31 of TIDA-01093 after the 12V logic chip output.  This will allow the Q42 gate voltage to fall and Q42 etc to stay off when the 12V logic chip output is low.