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LP8860-Q1: 电源管理论坛

Part Number: LP8860-Q1

Hello, Sir and Miss: 

I used "LED PWM Clock Generation With VSYNC" function of LP8860-Q1,  VSYNC is 60HZ

Is there a range requirement for the minimum on and off time for the VSYNC signals?

How long a high level VSYNC signal must last at least?

How long a low level VSYNC signal must last at least?

Thank you

Best Regards

  • 您好,

    如数据表中所述,该器件由 VSYNC 的上升沿触发,对高电平和低电平没有特定要求。

    如果 PWM_COUNTER_RESET = 1,则 VSYNC signal rising edge 重新启动 PWM 确保没有 clock drifting。