Other Parts Discussed in Thread: AFE8000
我正在使用AFE8000EVM 204C IP压缩包里提供zcu102的参考例程。我参考了这个帖子进行设置，[参考译文] AFE8000EVM：使用 TI-JESD204C (64b/66B)将 EVM 连接到 zcu102 - 射频与微波（参考译文帖）(Read Only) - 射频与微波（参考译文帖） - E2E
设计支持，步骤和excel配置相同。但是ADC仍然不能工作。
以下是AFE80xxCat输出。
AFE80xxCatLibrary
spi - USB Instrument created.
resetDevice
Kintex RegProgrammer - USB Instrument created.
Kintex RegProgrammer - USB Instrument created.
Kintex RegProgrammer - USB Instrument created.
Power Card - USB Instrument created.
cpldRegProg._pin0 : write failed.
cpldRegProg._pin1 : write failed.
cpldRegProg._pin2 : write failed.
cpldRegProg._pin3 : write failed.
cpldRegProg._pin4 : write failed.
cpldRegProg._pin5 : write failed.
cpldRegProg._pin6 : write failed.
cpldRegProg._pin7 : write failed.
Reset the FPGA and try again.
Loaded Libraries
FPGA Reset device not found
Reset the FPGA and try again.
FPGA Reset device not found
Loaded Configuration: AFE8000_SampleConfig.xlsx
Refreshed the GUI.
#================ ERRORS:4, WARNINGS:8 ================#
#================ ERRORS:0, WARNINGS:0 ================#
Loaded Configuration: AFE8000EVM_TI_JESD204C.xlsx
In L=8 single link mode, the Sync Mux should be same for all mappers. Forcing the rxJesdTxSyncMux value to [0, 0, 0, 0]
Refreshed the GUI.
For these rates, 1KHz raster mode is not supported. Changing to 32-bit NCO mode.
Refreshed the GUI.
Applied Parameters.
For these rates, 1KHz raster mode is not supported. Changing to 32-bit NCO mode.
Refreshed the GUI.
Applied Parameters.
Device Initialization for ChipVersion: 2.0
The External Sysref Frequency should be an integer factor of: 0.325521MHz
2T2R1F Number: 0
Valid Configuration: True
laneRateRx: 10312.5
laneRateRx1: 10312.5
laneRateFb: 10312.5
laneRateTx0: 10312.5
laneRateTx1: 10312.5
2T2R1F Number: 1
Valid Configuration: True
laneRateRx: 10312.5
laneRateRx1: 10312.5
laneRateFb: 10312.5
laneRateTx0: 10312.5
laneRateTx1: 10312.5
LMK Clock Divider - Device registers reset.
LMK Clock Divider - Device registers reset.
LMK and FPGA Configured.
DONOT_OPEN_Afe80xx_FULL - Device registers reset.
chipType: 0xa
chipId: 0x8001
chipVersion: 0x20
LMK and FPGA Configured.
AFE Reset Done
Fuse farm load autoload done successful
No autload error
Fuse farm load autoload done successful
No autload error
//Firmware Version = 9108
//PG Version = 1
//Release Date [dd/mm/yy] = 28/8/20
//Patch Version = 0
//PG Version = 0
//Release Date [dd/mm/yy] = 0/0/0
AFE MCU Wake up done and patch loaded.
PLL Locked
AFE PLL Configured.
AFE SerDes Configured.
AFE Digital Chains configured.
Waiting check for Property_110h_7_0 to become 2, Count: 50
AFE RX Analog configured.
AFE FB Analog configured.
AFE JESD configured.
AFE AGC configured.
AFE PAP and Alarms configured.
AFE GPIO configured.
Sysref Read as expected
Setting RBD to: 2
Setting RBD to: 2
Setting RBD to: 2
Setting RBD to: 2
Setting RBD to: 2
Setting RBD to: 2
Setting RBD to: 2
Setting RBD to: 2
AFE Configuration Complete
Setting RBD to: 2
Setting RBD to: 2
#================ ERRORS:0, WARNINGS:0 ================#
