line in hpout 输出正常 i2s 采集不输出 寄存器配置如下 {1, 0x80},
{102, 0x02}, //c2
{3, 0x81},
{4, 0x20},
{5, 0x0},
{6, 0x0},
{7, 0x8a},
{8, 0x34},
{9, 0x37},
//{10, 0x01}, //offect
{11, 0x01},
{12, 0xff}, // dac 0xf0
{15, 0x00}, //00
{16, 0x00}, //00
//in2lr
{17, 0x0f}, //IN2l enable
{18, 0xf0}, //IN2r LINE2 enable
//in1lrlm
//{19, 0x04}, //7c // 4//LINE1L disable
//{21, 0x80},
//{22, 0x04}, //7c // 4//LINE1R disable
//{24, 0x80},
{19, 0x04}, //MIC1LP/LINE1LP配置为单端模式 1：左ADC通道上电
{21, 0x78},
{22, 0x04}, //0：MIC1RP/LINE1RP配置为单端模式. 1：右ADC通道上电.
{23, 0x78},
{24, 0x78},
{25, 0x40}, //00 micbias=2v 00
{26, 0x00}, //00 adc 00ff Left AGC is enabled
//{27, 0x00}, //fe adc off
{28, 0x00}, //00
{29, 0x00}, //00 adc off
//{30, 0x00}, //fe
{31, 0x00}, //00
{32, 0x00},
{33, 0x00},
//micbias
//{25, 0x40}, //00 micbias=2v 00
//agc未使能 26-36
//dac
{37, 0xc0},
{38, 0x06},
{40, 0xc0},
//{41, 0x01},
{41, 0x00}, //inl 2 adc1l , inr 2 adc1r, left adc volume and rigth adc volume have independent controle
//dac path
{42, 0xa8},
{43, 0x00},
{44, 0x00},
{46, 0x80}, //00 //PGA_L to HPLOUT
{47, 0x80}, //80 //hplout
{51, 0x0d}, //0d
{53, 0x80},//PGA_L to HPLCOM
{54, 0x80}, //hplcom
{58, 0x0d},
{56, 0x80}, //PGA_R to HPLCOM Volume Control Register
{57, 0x80}, //DAC_R1 to HPLCOM Volume Control Register
{60, 0x80}, //PGA_L to HPROUT Volume Control Register
{61, 0x80}, //DAC_L1 to HPROUT Volume Control Register
{63, 0x80}, //00
{64, 0x80}, //80 //hprout
{65, 0x0d},
{67, 0x80}, //PGA_L 到HPRCOM
{68, 0x80},// ：DAC_L1 到HPRCOM
{70, 0x80}, //hprcom
{71, 0x80}, //hprcom
{72, 0x0d},
{81, 0x80},
{86, 0x09}, //0b
