The platform:rockchip px30,kernel 4.4
1.system power up,px30 mac mdio can read the phy dp83822 id, and can dump registers,registers listed below:
[root@px30_64:/]# cat /sys/bus/mdio_bus/devices/stmmac-0\:01/phy_registers
0: 0x3800
1: 0x7849
2: 0x2000
3: 0xa240
4: 0x1e1
5: 0x0
6: 0x4
7: 0x2001
8: 0x0
9: 0x0
10: 0x100
11: 0x1000
12: 0x0
13: 0x401f
14: 0x0
15: 0x0
16: 0x2
17: 0x108
18: 0x0
19: 0x800
20: 0x0
21: 0x0
22: 0x0
23: 0xe1
24: 0x480
25: 0x8021
26: 0x0
27: 0x7d
28: 0x5ee
29: 0x0
30: 0x2
31: 0x0
0x0467 :0xffc
0x0468 :0x0
If I want to rmii/mii loopback test,I do that like(www.ti.com.cn/.../snla266.pdf)
B.1 MII Loopback 100BASE-TX Script
begin
| 001F 8000 0000 6100 001F 4000 end |
//software reset (clears register) //programs DUT to 100BASE-TX mode and enables MII Loopback //digital reset (doesn’t clear register) |
I write 0x8000 value to 0x001f register later,It apear a wrong link up like below:
[ 392.195242] libphy: Set Ethernet PHY register 14336 to 0x0
[root@px30_64:/]# [ 392.480572] rk_gmac-dwmac ff360000.ethernet eth0: Link is Up - 100Mbps/Full - flow control rx/tx
And this wrong Link up later, I can not dump registers.I read the phy registers from 0x0~0x1f,like below listed,it return 0xffff.
[root@px30_64:/]# cat /sys/bus/mdio_bus/devices/stmmac-0\:01/phy_registers
0: 0xffff
1: 0xffff
2: 0xffff
3: 0xffff
4: 0xffff
5: 0xffff
6: 0xffff
7: 0xffff
8: 0xffff
9: 0xffff
10: 0xffff
11: 0xffff
12: 0xffff
13: 0xffff
14: 0xffff
15: 0xffff
16: 0xffff
17: 0xffff
18: 0xffff
19: 0xffff
20: 0xffff
21: 0xffff
22: 0xffff
23: 0xffff
24: 0xffff
25: 0xffff
26: 0xffff
27: 0xffff
28: 0xffff
29: 0xffff
30: 0xffff
31: 0xffff
We use dp83822 slave mode,px30 mac fed 50MHZ clk to the phy dp83822.
What the problem about the dp83822 phy? How to find the problem? Please anybody can give me some advices?
hardware bootstrap and schematic has been in the attachment.
