Hello,According to the suggestion:"datasheet 19 page “The VSET voltage is applied using a DAC through a 20kΩ series resistor."
As shown below
test circuit :
Correction Problem Description
Test Circuit Setting conditions:
single-ended input;DC bias 2V/AVDD 3.3V
(PD = 0);(MODE = 0);(RBIAS=1);Low-Current Mode
The iout current is also locked and cannot be controlled by VSET,VSET'' voltage is locked 2.1V
Is there a problem with the circuit wiring method or design parameters, or is the development board damaged?
