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现在从外部输入100M 0dB 的时钟，需要对时钟进行放大，放大为LVTTL 的电平 或用高速时钟比较器做比较，转换为LVTTL 电平输入到FPGA，请问有没有放大器或高速时钟比较器推荐的？
谢谢！
亲；这个电路；建议用共基放大后接高速逻辑输出。
