IWR 1443 demo 外部flash如何使用？

你好。

请参考：

/*----------------------------------------------------------------------------*/
/* XWR14xx.cmd                                                                 */
/*                                                                            */
/* (c) Texas Instruments 2016, All rights reserved.                           */
/*                                                                            */

/* USER CODE BEGIN (0) */
/* USER CODE END */


/*----------------------------------------------------------------------------*/
/* Linker Settings                                                            */
--retain="*(.intvecs)"

/*----------------------------------------------------------------------------*/
/* Memory Map                                                                 */
/*----------------------------------------------------------------------------*/

MEMORY{

PAGE 0:



    VECTORS  (X)  : origin=0x00000000 length=0x00000100

    PROG_RAM (RX) : origin=0x00000100 length=0x0001FF00

    DATA_RAM (RW) : origin=0x08000000 length=0x00010000




    //L3_RAM (RW)   : origin=0x51020000 length=0x00036000

    L3_RAM (RW)   : origin=0x51020000 length=0x00032000

	PROG_RAM_2 (RW) : origin=0x51052000 length=0x00004000

    L3_RAM_CONST (RW) : origin=0x51056000 length=0x00004000

    HWA_RAM (RW)  : origin=0x52030000 length=0x00010000



PAGE 1:

    L3_RAM (RW)   : origin=0x51020000 length=0x00040000

}



/*----------------------------------------------------------------------------*/

/* Section Configuration                                                      */

/* 14xx ROM bootloader requires strict 16 byte alignment for the loadable     */

/* program sections                                                           */

/*----------------------------------------------------------------------------*/

SECTIONS

{

    .intvecs : {} > VECTORS



    /* Ensure that these sections are placed in the TCMA; since the bootloader

     * will load to only TCMA. */
	/* Allocate data preferentially in one UMAP and code (.text) in another,
       this can improve performance due to simultaneous misses from L1P
       and L1D caches to L2 SRAM, for more information see C674 Megamodule
       User Guide section "Level 2 Memory Architecture".
       The linker notation "X >> Y | Z" indicates section X is first allocated in Y
       and allowed to overflow into Z and can be split from Y to Z.
    */
    .text    : {} >> PROG_RAM | PROG_RAM_2 ALIGN(16)


    .const   : {} > L3_RAM_CONST ALIGN(16)

    .cinit   : {} > L3_RAM_CONST ALIGN(16)



    //.const   : {} > PROG_RAM ALIGN(16)

    //.cinit   : {} > PROG_RAM ALIGN(16)

    .pinit   : {} > PROG_RAM ALIGN(16)

//    .pinit   : {} > L3_RAM_CONST ALIGN(16)


    .bss     : {} > DATA_RAM

    .data    : {} > DATA_RAM

    .stack   : {} > DATA_RAM


}



/*----------------------------------------------------------------------------*/




/*----------------------------------------------------------------------------*/