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IWR1443 PMIC_CLOUT

ZhaiQian
Prodigy 150 points
Other Parts Discussed in Thread: IWR1443

我想使用IWR1443的PMIC_CLKOUT输出时钟信号。

但是我发现IWR1443没有直接调用的api。然后我在英文论坛进行了搜索参考，也参照了TRM。但是发现TRM手册上的IWR1443和其他mmw芯片也有区别。

我自己是如下写的，但是并没有观测到时钟输出，想请教下如何解决这个问题，谢谢。

我先设置了引脚P13复用为PMIC_CLKOUT

然后调用了自己写的函数

static int32_t SOC_setPMIC_CLKOUT(SOC_Handle handle, int32_t* errCode)
{
    SOC_DriverMCB*      ptrSOCDriverMCB;
    int32_t             retVal = 0;
    pmicClockCfg_t pmicClkCfg;
    pmicClkCfg.pmicClkOutEn = 1U;
    pmicClkCfg.pmicClkOutSrc = 0U; /* CLK Src XTAL：40MHz */
    pmicClkCfg.pmicClkSrcDiv = 16U; /* 40M / 250 = 160 KHz */
    pmicClkCfg.modeSel = 0U;
    pmicClkCfg.freqSlope = 0U;
    pmicClkCfg.minNdivVal = 15U;
    pmicClkCfg.maxNdivVal = 17U;
    pmicClkCfg.clkDitherEn = 0U;
    /* Get the pointer to the SOC Driver Block: */
    ptrSOCDriverMCB = (SOC_DriverMCB*)handle;
    if (ptrSOCDriverMCB == NULL)
    {
        *errCode = SOC_EINVAL;
        retVal   = MINUS_ONE;
    }
    else
    {
        System_printf("Debug: PMIC Initialization was successful\n");
        //设置PMIC输出
        SOC_DriverMCB* ptrSOCDriverMCB = (SOC_DriverMCB*)handle;
        /* PMIC clockout enable request is issued*/
        /* Disable the dithering control block .DCDCCTL1.DCDCLKEN */    //toprcmREG->DCDCCTL1[1] = 0U;
        //ptrSOCDriverMCB->ptrTopRCMRegs->DCDCCTL1 = CSL_FINSR (ptrSOCDriverMCB->ptrTopRCMRegs->DCDCCTL1, 1U, 1U, 0U);
        /* 1 Setup the frequency slope .DCDCCTL0.DCDCCTL0 */    //toprcmREG->DCDCCTL0[25:0]= pmicClkCfg.freqSlope;
        ptrSOCDriverMCB->ptrTopRCMRegs->DCDCCTL0 = CSL_FINSR (ptrSOCDriverMCB->ptrTopRCMRegs->DCDCCTL0,
                                                              25U, 0U, pmicClkCfg.freqSlope);
        /* 2 Dithering control block reset. Set to 0 .DCDCCTL1.DCDCRST */
        ptrSOCDriverMCB->ptrTopRCMRegs->DCDCCTL1 = CSL_FINSR (ptrSOCDriverMCB->ptrTopRCMRegs->DCDCCTL1, 0U, 0U, 0U);
        /* 3 Enable the dithering control block .DCDCCTL1.DCDCLKEN */    //toprcmREG->DCDCCTL1[1] = 1U;
        ptrSOCDriverMCB->ptrTopRCMRegs->DCDCCTL1 = CSL_FINSR (ptrSOCDriverMCB->ptrTopRCMRegs->DCDCCTL1, 1U, 1U, 1U);
        /* 4 Setup the mode of operation .DCDCCTL1.DCDCCTL1[8] */    //toprcmREG->DCDCCTL1[8] = pmicClkCfg.modeSel;
        ptrSOCDriverMCB->ptrTopRCMRegs->DCDCCTL1 = CSL_FINSR (ptrSOCDriverMCB->ptrTopRCMRegs->DCDCCTL1,
                                                              8U, 8U, pmicClkCfg.modeSel);
        /* 5 Setup the clock dither control .DCDCCTL1.DCDCCTL1[9] */    //toprcmREG->DCDCCTL1[9] = pmicClkCfg.clkDitherEn
        ptrSOCDriverMCB->ptrTopRCMRegs->DCDCCTL1 = CSL_FINSR (ptrSOCDriverMCB->ptrTopRCMRegs->DCDCCTL1,
                                                              9U, 9U, pmicClkCfg.clkDitherEn);
        /* 6 7 Setup the divider value */
        //toprcmREG->DCDCCTL1[23:16] = pmicClkCfg.minNdivVal;  //toprcmREG->DCDCCTL1[31:24] = pmicClkCfg.maxNdivVal;
        ptrSOCDriverMCB->ptrTopRCMRegs->DCDCCTL1 = CSL_FINSR (ptrSOCDriverMCB->ptrTopRCMRegs->DCDCCTL1,
                                                              23U, 16U, pmicClkCfg.minNdivVal);
        ptrSOCDriverMCB->ptrTopRCMRegs->DCDCCTL1 = CSL_FINSR (ptrSOCDriverMCB->ptrTopRCMRegs->DCDCCTL1,
                                                              31U, 24U, pmicClkCfg.maxNdivVal);
        //初始化
        /* Disable the clock by gating off the clock */    //toprcmREG.EXTCLKCTL[15:8] = 0xAD;
        ptrSOCDriverMCB->ptrTopRCMRegs->EXTCLKCTL = CSL_FINSR (ptrSOCDriverMCB->ptrTopRCMRegs->EXTCLKCTL, 15U, 8U, 0xADU);
        /* Setup the clock divider value */    //toprcmREG->EXTCLKDIV[15:8] = pmicClkCfg.pmicClkSrcDiv;
        ptrSOCDriverMCB->ptrTopRCMRegs->EXTCLKDIV = CSL_FINSR (ptrSOCDriverMCB->ptrTopRCMRegs->EXTCLKDIV,
                                                               15U, 8U, pmicClkCfg.pmicClkSrcDiv);
        /* Select the source of the PMIC clock */    //toprcmREG->EXTCLKSRCSEL[11:8] = pmicClkCfg.pmicClkOutSrc;
        ptrSOCDriverMCB->ptrTopRCMRegs->EXTCLKSRCSEL = CSL_FINSR (ptrSOCDriverMCB->ptrTopRCMRegs->EXTCLKSRCSEL,
                                                                  11U, 8U, pmicClkCfg.pmicClkOutSrc);
        /* Ungate the PMIC clockout */    //toprcmREG->EXTCLKCTL[15:8] = 0x0U;
        ptrSOCDriverMCB->ptrTopRCMRegs->EXTCLKCTL = CSL_FINSR (ptrSOCDriverMCB->ptrTopRCMRegs->EXTCLKCTL, 15U, 8U, 0U);
        /* Dithering control block reset. Set to 1 .DCDCCTL1.DCDCRST */
        ptrSOCDriverMCB->ptrTopRCMRegs->DCDCCTL1 = CSL_FINSR (ptrSOCDriverMCB->ptrTopRCMRegs->DCDCCTL1, 0U, 0U, 1U);
    }
    return retVal;
}
根据打印信息发现寄存器的设置写入操作步骤都是正常执行了的。