使用器件：TMS320F28377S，封装为100pin
目的：使EPWM7与EPWM10载波移相180度
操作方法：根据数据手册EPWM7与EPWM10不属于同一个同步链，因此在EPWM7过零的时候产生同步信号，同时选择EMPW10的同步输入源为EPWM7，具体代码如下，结果显示EPWM7和EPWM10移相180度，怀疑EPWM7的同步触发信号未送到EPWM10，是否100pin引脚的不能这样操作？
EALLOW;
EPwm7Regs.TBPRD = TPRD_CLLC_Init; // Set timer period 增减计数：200=200MHz/(500kHz*2)
EPwm7Regs.TBPHS.bit.TBPHS = 0x0000; // Phase is 0
EPwm7Regs.TBCTR = 0x0000; // Clear counter
EPwm7Regs.TBPHS.bit.TBPHS = 0x0000; // Phase is 0
EPwm7Regs.TBCTR = 0x0000; // Clear counter
// Setup TBCLK
// TBCLK=SYSCLKOUT/(HSPCLKDIV×CLKDIV)
EPwm7Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up_down
EPwm7Regs.TBCTL.bit.PRDLD = TB_SHADOW;
EPwm7Regs.TBCTL.bit.PHSEN = TB_DISABLE; // 01表示Enable phase loading
EPwm7Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO; // 01表示同步由EPWM7产生
EPwm7Regs.TBCTL.bit.HSPCLKDIV = __HSPCLKDIV; // Clock ratio to SYSCLKOUT
EPwm7Regs.TBCTL.bit.CLKDIV = __CLKDIV; // 例程的TBCLK=200MHz/(1*1)=2000MHz
// TBCLK=SYSCLKOUT/(HSPCLKDIV×CLKDIV)
EPwm7Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up_down
EPwm7Regs.TBCTL.bit.PRDLD = TB_SHADOW;
EPwm7Regs.TBCTL.bit.PHSEN = TB_DISABLE; // 01表示Enable phase loading
EPwm7Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO; // 01表示同步由EPWM7产生
EPwm7Regs.TBCTL.bit.HSPCLKDIV = __HSPCLKDIV; // Clock ratio to SYSCLKOUT
EPwm7Regs.TBCTL.bit.CLKDIV = __CLKDIV; // 例程的TBCLK=200MHz/(1*1)=2000MHz
EPwm10Regs.TBPRD = TPRD_CLLC_Init; // Set timer period 增减计数：200=200MHz/(500kHz*2)
EPwm10Regs.TBPHS.bit.TBPHS = 0; // Phase is 1800,为满足Q8与Q5同步
EPwm10Regs.TBCTR = 0x0000; // Clear counter
SyncSocRegs.SYNCSELECT.bit.EPWM10SYNCIN = 0x10; //同步源选择Epwm7
EPwm10Regs.TBPHS.bit.TBPHS = 0; // Phase is 1800,为满足Q8与Q5同步
EPwm10Regs.TBCTR = 0x0000; // Clear counter
SyncSocRegs.SYNCSELECT.bit.EPWM10SYNCIN = 0x10; //同步源选择Epwm7
EPwm10Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up down
EPwm10Regs.TBCTL.bit.PRDLD = TB_SHADOW;
EPwm10Regs.TBCTL.bit.PHSEN = TB_ENABLE; // 01表示Enable phase loading
EPwm10Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE; // 03表示同步由EPWM7产生,传到此,不再向下传递
EPwm10Regs.TBCTL.bit.HSPCLKDIV = __HSPCLKDIV; // Clock ratio to SYSCLKOUT
EPwm10Regs.TBCTL.bit.CLKDIV = __CLKDIV; // 例程的TBCLK=200MHz/(1*1)=200MHz
EPwm10Regs.TBCTL.bit.HSPCLKDIV = __HSPCLKDIV; // Clock ratio to SYSCLKOUT
EPwm10Regs.TBCTL.bit.CLKDIV = __CLKDIV; // 例程的TBCLK=200MHz/(1*1)=200MHz