This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Pll芯片参数

想咨询有关锁相环芯片的问题。锁相环芯片中有参数Normalized PLL Phase Noise (dBc/Hz)和1/f Noise (10 kHz offset at 1 GHz carrier) (dBc/Hz),请问这两个参数有什么区别,都是由什么引起的?另外锁相环芯片,芯片底噪低频处是平的吗,如果是请帮忙推荐几款芯片底噪比较低的型号