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需要实现两个单端信号分别用左右两个ADC同时采样。信号分别隔了电容后接1L和1R，1L接L_ADC,1R接R_ADC.例程参考“Stereo ADC with 48ksps Sample Rate and Low Power”，现在问题是隔直电容前后信号幅值不一致。隔直后信号幅度大于隔直前，且频率越低幅值相差越大。
