我想用aic3204的DSP模式，数据格式为mono，耳机的输出模式Mono Differential DAC to Mono Differential Headphone Output和Mono DAC and Analog Bypass Input to Mono Differential Headphone Output这两种模式有什么区别呢，下面是我的配置，在C5535的一个例子上改的，我将I2S配成了dsp模式，耳机有声音输出，但是用示波器看波形的时候，波形不对，我发的是一个正弦信号，走势大致正确。请问是什么原因呢，我现在不用AD，只用到了DA部分。
AIC3204_rset( 0, 0x00 ); // Select page 0
AIC3204_rset( 1, 0x01 ); // Reset codec
EZDSP5535_waitusec(1000); // Wait 1ms after reset
AIC3204_rset( 0, 0x01 ); // Select page 1
AIC3204_rset( 1, 0x08 ); // Disable crude AVDD generation from DVDD
AIC3204_rset( 2, 0x01 ); // Enable Analog Blocks, use LDO power
AIC3204_rset( 123,0x05 ); // Force reference to power up in 40ms
EZDSP5535_waitusec(50000); // Wait at least 40ms
AIC3204_rset( 0, 0x00 ); // Select page 0
/* PLL and Clocks config and Power Up */
AIC3204_rset( 27, 0x4d ); // BCLK and WCLK are set as o/p; AIC3204(Master)
AIC3204_rset( 28, 0x01 ); // Data ofset = 0
AIC3204_rset( 4, 0x03 ); // PLL setting: PLLCLK <- MCLK, CODEC_CLKIN <-PLL CLK
AIC3204_rset( 6, 0x07 ); // PLL setting: J=7
AIC3204_rset( 7, 0x06 ); // PLL setting: HI_BYTE(D=1680)
AIC3204_rset( 8, 0x90 ); // PLL setting: LO_BYTE(D=1680)
AIC3204_rset( 30, 0x88 ); // For 32 bit clocks per frame in Master mode ONLY
// BCLK=DAC_CLK/N =(12288000/8) = 1.536MHz = 32*fs
AIC3204_rset( 5, 0x91 ); // PLL setting: Power up PLL, P=1 and R=1
EZDSP5535_waitusec(10000); // Wait for PLL to come up
AIC3204_rset( 13, 0x00 ); // Hi_Byte(DOSR) for DOSR = 128 decimal or 0x0080 DAC oversamppling
AIC3204_rset( 14, 0x80 ); // Lo_Byte(DOSR) for DOSR = 128 decimal or 0x0080
AIC3204_rset( 20, 0x80 ); // AOSR for AOSR = 128 decimal or 0x0080 for decimation filters 1 to 6
AIC3204_rset( 11, 0x82 ); // Power up NDAC and set NDAC value to 2
AIC3204_rset( 12, 0x87 ); // Power up MDAC and set MDAC value to 7
AIC3204_rset( 18, 0x87 ); // Power up NADC and set NADC value to 7
AIC3204_rset( 19, 0x82 ); // Power up MADC and set MADC value to 2
/* DAC ROUTING and Power Up */
AIC3204_rset( 0, 0x01 ); // Select page 1
//AIC3204_rset( 9, 0x30 );
//AIC3204_rset( 10, 0x03 ); //#COMMON MODE CONTROL REGISTER Output of HP is powered by LDOIN
//AIC3204_rset( 11, 0x10 ); //Over Current detection is enabled for HPL & HPR
AIC3204_rset( 12, 0x08 ); // LDAC AFIR routed to HPL
AIC3204_rset( 13, 0x10 ); // RDAC AFIR routed to HPR
AIC3204_rset( 0, 0x00 ); // Select page 0
AIC3204_rset( 64, 0x82 ); // Left vol=right vol
AIC3204_rset( 65, 0x00 ); // Left DAC gain to 0dB VOL; Right tracks Left
AIC3204_rset( 63, 0x90 ); // Power up left,right data paths and set channel
AIC3204_rset( 0, 0x01 ); // Select page 1
AIC3204_rset( 16, 0x3c ); // Unmute HPL , 0dB gain
AIC3204_rset( 17, 0x3c ); // Unmute HPR , 0dB gain
AIC3204_rset( 9 , 0x30 ); // Power up HPL,HPR
EZDSP5535_waitusec(100 ); // Wait
希望得到帮助，谢谢！
