Other Parts Discussed in Thread: C2000WARE
这是ADC3140的配置，两个级联的ADC3140芯片，我想实现一个帧同步发送8个slot的32位数据出来到总线，请问这样配置有什么不妥之处吗？
void I2C_config(void)
{
IICA_Write(0x98,0x02,0x81);
IICA_Write(0x9A,0x02,0x81);
DELAY_US(10*1000);
IICA_Write(0x98,0x00,0x00);
IICA_Write(0x98,0x07,0x31);
IICA_Write(0x98,0x08,0x00);
IICA_Write(0x98,0x09,0x00);
IICA_Write(0x98,0x21,0xA2);
IICA_Write(0x98,0x3B,0x00);
IICA_Write(0x98,0x0B,0x00);
IICA_Write(0x98,0x0C,0x01);
IICA_Write(0x98,0x0D,0x02);
IICA_Write(0x98,0x0E,0x03);
IICA_Write(0x98,0x3C,0xB4);
IICA_Write(0x98,0x41,0xB4);
IICA_Write(0x98,0x46,0xB4);
IICA_Write(0x98,0x4B,0xB4);
/*
IICA_Write(0x98,0x3C,0x94);
IICA_Write(0x98,0x41,0x94);
IICA_Write(0x98,0x46,0x94);
IICA_Write(0x98,0x4B,0x94);
*/
IICA_Write(0x98,0x3D,0x24);
IICA_Write(0x98,0x42,0x24);
IICA_Write(0x98,0x47,0x24);
IICA_Write(0x98,0x4C,0x24);
IICA_Write(0x98,0x6B,0x00);
IICA_Write(0x98,0x6C,0xD0);
IICA_Write(0x98,0x00,0x02);
IICA_Write(0x98,0x08,0x7F);
IICA_Write(0x98,0x09,0xFF);
IICA_Write(0x98,0x0A,0xFF);
IICA_Write(0x98,0x0B,0xFF);
IICA_Write(0x98,0x00,0x02);
IICA_Write(0x98,0x0C,0x80);
IICA_Write(0x98,0x0D,0xD3);
IICA_Write(0x98,0x0E,0xD5);
IICA_Write(0x98,0x0F,0xE3);
IICA_Write(0x98,0x00,0x02);
IICA_Write(0x98,0x10,0x7F);
IICA_Write(0x98,0x11,0x93);
IICA_Write(0x98,0x12,0x61);
IICA_Write(0x98,0x13,0x37);
IICA_Write(0x98,0x00,0x02);
IICA_Write(0x98,0x14,0x7F);
IICA_Write(0x98,0x15,0x4F);
IICA_Write(0x98,0x16,0x03);
IICA_Write(0x98,0x17,0xF2);
IICA_Write(0x98,0x00,0x02);
IICA_Write(0x98,0x18,0x80);
IICA_Write(0x98,0x19,0x26);
IICA_Write(0x98,0x1A,0x94);
IICA_Write(0x98,0x1B,0xC9);
IICA_Write(0x98,0x00,0x02);
IICA_Write(0x98,0x58,0x7F);
IICA_Write(0x98,0x59,0xFF);
IICA_Write(0x98,0x5A,0xFF);
IICA_Write(0x98,0x5B,0xFF);
IICA_Write(0x98,0x00,0x02);
IICA_Write(0x98,0x5C,0x80);
IICA_Write(0x98,0x5D,0xD3);
IICA_Write(0x98,0x5E,0xD5);
IICA_Write(0x98,0x5F,0xE3);
IICA_Write(0x98,0x00,0x02);
IICA_Write(0x98,0x60,0x7F);
IICA_Write(0x98,0x61,0x93);
IICA_Write(0x98,0x62,0x61);
IICA_Write(0x98,0x63,0x37);
IICA_Write(0x98,0x00,0x02);
IICA_Write(0x98,0x64,0x7F);
IICA_Write(0x98,0x65,0x4F);
IICA_Write(0x98,0x66,0x03);
IICA_Write(0x98,0x67,0xF2);
IICA_Write(0x98,0x00,0x02);
IICA_Write(0x98,0x68,0x80);
IICA_Write(0x98,0x69,0x26);
IICA_Write(0x98,0x6A,0x94);
IICA_Write(0x98,0x6B,0xC9);
IICA_Write(0x98,0x00,0x02);
IICA_Write(0x98,0x1C,0x7F);
IICA_Write(0x98,0x1D,0xFF);
IICA_Write(0x98,0x1E,0xFF);
IICA_Write(0x98,0x1F,0xFF);
IICA_Write(0x98,0x00,0x02);
IICA_Write(0x98,0x20,0x80);
IICA_Write(0x98,0x21,0xD3);
IICA_Write(0x98,0x22,0xD5);
IICA_Write(0x98,0x23,0xE3);
IICA_Write(0x98,0x00,0x02);
IICA_Write(0x98,0x24,0x7F);
IICA_Write(0x98,0x25,0x93);
IICA_Write(0x98,0x26,0x61);
IICA_Write(0x98,0x27,0x37);
IICA_Write(0x98,0x00,0x02);
IICA_Write(0x98,0x28,0x7F);
IICA_Write(0x98,0x29,0x4F);
IICA_Write(0x98,0x2A,0x03);
IICA_Write(0x98,0x2B,0xF2);
IICA_Write(0x98,0x00,0x02);
IICA_Write(0x98,0x2C,0x80);
IICA_Write(0x98,0x2D,0x26);
IICA_Write(0x98,0x2E,0x94);
IICA_Write(0x98,0x2F,0xC9);
IICA_Write(0x98,0x00,0x02);
IICA_Write(0x98,0x6C,0x7F);
IICA_Write(0x98,0x6D,0xFF);
IICA_Write(0x98,0x6E,0xFF);
IICA_Write(0x98,0x6F,0xFF);
IICA_Write(0x98,0x00,0x02);
IICA_Write(0x98,0x70,0x80);
IICA_Write(0x98,0x71,0xD3);
IICA_Write(0x98,0x72,0xD5);
IICA_Write(0x98,0x73,0xE3);
IICA_Write(0x98,0x00,0x02);
IICA_Write(0x98,0x74,0x7F);
IICA_Write(0x98,0x75,0x93);
IICA_Write(0x98,0x76,0x61);
IICA_Write(0x98,0x77,0x37);
IICA_Write(0x98,0x00,0x02);
IICA_Write(0x98,0x78,0x7F);
IICA_Write(0x98,0x79,0x4F);
IICA_Write(0x98,0x7A,0x03);
IICA_Write(0x98,0x7B,0xF2);
IICA_Write(0x98,0x00,0x02);
IICA_Write(0x98,0x7C,0x80);
IICA_Write(0x98,0x7D,0x26);
IICA_Write(0x98,0x7E,0x94);
IICA_Write(0x98,0x7F,0xC9);
IICA_Write(0x98,0x00,0x02);
IICA_Write(0x98,0x30,0x7F);
IICA_Write(0x98,0x31,0xFF);
IICA_Write(0x98,0x32,0xFF);
IICA_Write(0x98,0x33,0xFF);
IICA_Write(0x98,0x00,0x02);
IICA_Write(0x98,0x34,0x80);
IICA_Write(0x98,0x35,0xD3);
IICA_Write(0x98,0x36,0xD5);
IICA_Write(0x98,0x37,0xE3);
IICA_Write(0x98,0x00,0x02);
IICA_Write(0x98,0x38,0x7F);
IICA_Write(0x98,0x39,0x93);
IICA_Write(0x98,0x3A,0x61);
IICA_Write(0x98,0x3B,0x37);
IICA_Write(0x98,0x00,0x02);
IICA_Write(0x98,0x3C,0x7F);
IICA_Write(0x98,0x3D,0x4F);
IICA_Write(0x98,0x3E,0x03);
IICA_Write(0x98,0x3F,0xF2);
IICA_Write(0x98,0x00,0x02);
IICA_Write(0x98,0x40,0x80);
IICA_Write(0x98,0x41,0x26);
IICA_Write(0x98,0x42,0x94);
IICA_Write(0x98,0x43,0xC9);
IICA_Write(0x98,0x00,0x03);
IICA_Write(0x98,0x08,0x7F);
IICA_Write(0x98,0x09,0xFF);
IICA_Write(0x98,0x0A,0xFF);
IICA_Write(0x98,0x0B,0xFF);
IICA_Write(0x98,0x00,0x03);
IICA_Write(0x98,0x0C,0x80);
IICA_Write(0x98,0x0D,0xD3);
IICA_Write(0x98,0x0E,0xD5);
IICA_Write(0x98,0x0F,0xE3);
IICA_Write(0x98,0x00,0x03);
IICA_Write(0x98,0x10,0x7F);
IICA_Write(0x98,0x11,0x93);
IICA_Write(0x98,0x12,0x61);
IICA_Write(0x98,0x13,0x37);
IICA_Write(0x98,0x00,0x03);
IICA_Write(0x98,0x14,0x7F);
IICA_Write(0x98,0x15,0x4F);
IICA_Write(0x98,0x16,0x03);
IICA_Write(0x98,0x17,0xF2);
IICA_Write(0x98,0x00,0x03);
IICA_Write(0x98,0x18,0x80);
IICA_Write(0x98,0x19,0x26);
IICA_Write(0x98,0x1A,0x94);
IICA_Write(0x98,0x1B,0xC9);
IICA_Write(0x98,0x00,0x02);
IICA_Write(0x98,0x44,0x7F);
IICA_Write(0x98,0x45,0xFF);
IICA_Write(0x98,0x46,0xFF);
IICA_Write(0x98,0x47,0xFF);
IICA_Write(0x98,0x00,0x02);
IICA_Write(0x98,0x48,0x80);
IICA_Write(0x98,0x49,0xD3);
IICA_Write(0x98,0x4A,0xD5);
IICA_Write(0x98,0x4B,0xE3);
IICA_Write(0x98,0x00,0x02);
IICA_Write(0x98,0x4C,0x7F);
IICA_Write(0x98,0x4D,0x93);
IICA_Write(0x98,0x4E,0x61);
IICA_Write(0x98,0x4F,0x37);
IICA_Write(0x98,0x00,0x02);
IICA_Write(0x98,0x50,0x7F);
IICA_Write(0x98,0x51,0x4F);
IICA_Write(0x98,0x52,0x03);
IICA_Write(0x98,0x53,0xF2);
IICA_Write(0x98,0x00,0x02);
IICA_Write(0x98,0x54,0x80);
IICA_Write(0x98,0x55,0x26);
IICA_Write(0x98,0x56,0x94);
IICA_Write(0x98,0x57,0xC9);
IICA_Write(0x98,0x00,0x03);
IICA_Write(0x98,0x1C,0x7F);
IICA_Write(0x98,0x1D,0xFF);
IICA_Write(0x98,0x1E,0xFF);
IICA_Write(0x98,0x1F,0xFF);
IICA_Write(0x98,0x00,0x03);
IICA_Write(0x98,0x20,0x80);
IICA_Write(0x98,0x21,0xD3);
IICA_Write(0x98,0x22,0xD5);
IICA_Write(0x98,0x23,0xE3);
IICA_Write(0x98,0x00,0x03);
IICA_Write(0x98,0x24,0x7F);
IICA_Write(0x98,0x25,0x93);
IICA_Write(0x98,0x26,0x61);
IICA_Write(0x98,0x27,0x37);
IICA_Write(0x98,0x00,0x03);
IICA_Write(0x98,0x28,0x7F);
IICA_Write(0x98,0x29,0x4F);
IICA_Write(0x98,0x2A,0x03);
IICA_Write(0x98,0x2B,0xF2);
IICA_Write(0x98,0x00,0x03);
IICA_Write(0x98,0x2C,0x80);
IICA_Write(0x98,0x2D,0x26);
IICA_Write(0x98,0x2E,0x94);
IICA_Write(0x98,0x2F,0xC9);
IICA_Write(0x98,0x00,0x00);
IICA_Write(0x98,0x73,0xF0);
IICA_Write(0x98,0x74,0xF0);
IICA_Write(0x9A,0x00,0x00);
IICA_Write(0x9A,0x07,0x31);
IICA_Write(0x9A,0x08,0x00);
IICA_Write(0x9A,0x09,0x00);
IICA_Write(0x9A,0x21,0xA2);
IICA_Write(0x9A,0x3B,0x00);
IICA_Write(0x9A,0x0B,0x04);
IICA_Write(0x9A,0x0C,0x05);
IICA_Write(0x9A,0x0D,0x06);
IICA_Write(0x9A,0x0E,0x07);
IICA_Write(0x9A,0x3C,0xB4);
IICA_Write(0x9A,0x41,0xB4);
IICA_Write(0x9A,0x46,0xB4);
IICA_Write(0x9A,0x4B,0xB4);
/*
IICA_Write(0x9A,0x3C,0x94);
IICA_Write(0x9A,0x41,0x94);
IICA_Write(0x9A,0x46,0x94);
IICA_Write(0x9A,0x4B,0x94);
*/
IICA_Write(0x9A,0x3D,0x24);
IICA_Write(0x9A,0x42,0x24);
IICA_Write(0x9A,0x47,0x24);
IICA_Write(0x9A,0x4C,0x24);
IICA_Write(0x9A,0x6B,0x00);
IICA_Write(0x9A,0x6C,0x90);
IICA_Write(0x9A,0x00,0x02);
IICA_Write(0x9A,0x08,0x7F);
IICA_Write(0x9A,0x09,0xFF);
IICA_Write(0x9A,0x0A,0xFF);
IICA_Write(0x9A,0x0B,0xFF);
IICA_Write(0x9A,0x00,0x02);
IICA_Write(0x9A,0x0C,0x80);
IICA_Write(0x9A,0x0D,0xD3);
IICA_Write(0x9A,0x0E,0xD5);
IICA_Write(0x9A,0x0F,0xE3);
IICA_Write(0x9A,0x00,0x02);
IICA_Write(0x9A,0x10,0x7F);
IICA_Write(0x9A,0x11,0x93);
IICA_Write(0x9A,0x12,0x61);
IICA_Write(0x9A,0x13,0x37);
IICA_Write(0x9A,0x00,0x02);
IICA_Write(0x9A,0x14,0x7F);
IICA_Write(0x9A,0x15,0x4F);
IICA_Write(0x9A,0x16,0x03);
IICA_Write(0x9A,0x17,0xF2);
IICA_Write(0x9A,0x00,0x02);
IICA_Write(0x9A,0x18,0x80);
IICA_Write(0x9A,0x19,0x26);
IICA_Write(0x9A,0x1A,0x94);
IICA_Write(0x9A,0x1B,0xC9);
IICA_Write(0x9A,0x00,0x02);
IICA_Write(0x9A,0x58,0x7F);
IICA_Write(0x9A,0x59,0xFF);
IICA_Write(0x9A,0x5A,0xFF);
IICA_Write(0x9A,0x5B,0xFF);
IICA_Write(0x9A,0x00,0x02);
IICA_Write(0x9A,0x5C,0x80);
IICA_Write(0x9A,0x5D,0xD3);
IICA_Write(0x9A,0x5E,0xD5);
IICA_Write(0x9A,0x5F,0xE3);
IICA_Write(0x9A,0x00,0x02);
IICA_Write(0x9A,0x60,0x7F);
IICA_Write(0x9A,0x61,0x93);
IICA_Write(0x9A,0x62,0x61);
IICA_Write(0x9A,0x63,0x37);
IICA_Write(0x9A,0x00,0x02);
IICA_Write(0x9A,0x64,0x7F);
IICA_Write(0x9A,0x65,0x4F);
IICA_Write(0x9A,0x66,0x03);
IICA_Write(0x9A,0x67,0xF2);
IICA_Write(0x9A,0x00,0x02);
IICA_Write(0x9A,0x68,0x80);
IICA_Write(0x9A,0x69,0x26);
IICA_Write(0x9A,0x6A,0x94);
IICA_Write(0x9A,0x6B,0xC9);
IICA_Write(0x9A,0x00,0x02);
IICA_Write(0x9A,0x1C,0x7F);
IICA_Write(0x9A,0x1D,0xFF);
IICA_Write(0x9A,0x1E,0xFF);
IICA_Write(0x9A,0x1F,0xFF);
IICA_Write(0x9A,0x00,0x02);
IICA_Write(0x9A,0x20,0x80);
IICA_Write(0x9A,0x21,0xD3);
IICA_Write(0x9A,0x22,0xD5);
IICA_Write(0x9A,0x23,0xE3);
IICA_Write(0x9A,0x00,0x02);
IICA_Write(0x9A,0x24,0x7F);
IICA_Write(0x9A,0x25,0x93);
IICA_Write(0x9A,0x26,0x61);
IICA_Write(0x9A,0x27,0x37);
IICA_Write(0x9A,0x00,0x02);
IICA_Write(0x9A,0x28,0x7F);
IICA_Write(0x9A,0x29,0x4F);
IICA_Write(0x9A,0x2A,0x03);
IICA_Write(0x9A,0x2B,0xF2);
IICA_Write(0x9A,0x00,0x02);
IICA_Write(0x9A,0x2C,0x80);
IICA_Write(0x9A,0x2D,0x26);
IICA_Write(0x9A,0x2E,0x94);
IICA_Write(0x9A,0x2F,0xC9);
IICA_Write(0x9A,0x00,0x02);
IICA_Write(0x9A,0x6C,0x7F);
IICA_Write(0x9A,0x6D,0xFF);
IICA_Write(0x9A,0x6E,0xFF);
IICA_Write(0x9A,0x6F,0xFF);
IICA_Write(0x9A,0x00,0x02);
IICA_Write(0x9A,0x70,0x80);
IICA_Write(0x9A,0x71,0xD3);
IICA_Write(0x9A,0x72,0xD5);
IICA_Write(0x9A,0x73,0xE3);
IICA_Write(0x9A,0x00,0x02);
IICA_Write(0x9A,0x74,0x7F);
IICA_Write(0x9A,0x75,0x93);
IICA_Write(0x9A,0x76,0x61);
IICA_Write(0x9A,0x77,0x37);
IICA_Write(0x9A,0x00,0x02);
IICA_Write(0x9A,0x78,0x7F);
IICA_Write(0x9A,0x79,0x4F);
IICA_Write(0x9A,0x7A,0x03);
IICA_Write(0x9A,0x7B,0xF2);
IICA_Write(0x9A,0x00,0x02);
IICA_Write(0x9A,0x7C,0x80);
IICA_Write(0x9A,0x7D,0x26);
IICA_Write(0x9A,0x7E,0x94);
IICA_Write(0x9A,0x7F,0xC9);
IICA_Write(0x9A,0x00,0x02);
IICA_Write(0x9A,0x30,0x7F);
IICA_Write(0x9A,0x31,0xFF);
IICA_Write(0x9A,0x32,0xFF);
IICA_Write(0x9A,0x33,0xFF);
IICA_Write(0x9A,0x00,0x02);
IICA_Write(0x9A,0x34,0x85);
IICA_Write(0x9A,0x35,0x75);
IICA_Write(0x9A,0x36,0x4B);
IICA_Write(0x9A,0x37,0xED);
IICA_Write(0x9A,0x00,0x02);
IICA_Write(0x9A,0x38,0x7D);
IICA_Write(0x9A,0x39,0x08);
IICA_Write(0x9A,0x3A,0x7A);
IICA_Write(0x9A,0x3B,0xA3);
IICA_Write(0x9A,0x00,0x02);
IICA_Write(0x9A,0x3C,0x7B);
IICA_Write(0x9A,0x3D,0x9D);
IICA_Write(0x9A,0x3E,0x54);
IICA_Write(0x9A,0x3F,0x5D);
IICA_Write(0x9A,0x00,0x02);
IICA_Write(0x9A,0x40,0x80);
IICA_Write(0x9A,0x41,0xC0);
IICA_Write(0x9A,0x42,0x74);
IICA_Write(0x9A,0x43,0x06);
IICA_Write(0x9A,0x00,0x03);
IICA_Write(0x9A,0x08,0x7F);
IICA_Write(0x9A,0x09,0xFF);
IICA_Write(0x9A,0x0A,0xFF);
IICA_Write(0x9A,0x0B,0xFF);
IICA_Write(0x9A,0x00,0x03);
IICA_Write(0x9A,0x0C,0x90);
IICA_Write(0x9A,0x0D,0x18);
IICA_Write(0x9A,0x0E,0x5C);
IICA_Write(0x9A,0x0F,0xDC);
IICA_Write(0x9A,0x00,0x03);
IICA_Write(0x9A,0x10,0x7F);
IICA_Write(0x9A,0x11,0x66);
IICA_Write(0x9A,0x12,0xAC);
IICA_Write(0x9A,0x13,0xB6);
IICA_Write(0x9A,0x00,0x03);
IICA_Write(0x9A,0x14,0x70);
IICA_Write(0x9A,0x15,0x19);
IICA_Write(0x9A,0x16,0xE9);
IICA_Write(0x9A,0x17,0xAD);
IICA_Write(0x9A,0x00,0x03);
IICA_Write(0x9A,0x18,0x80);
IICA_Write(0x9A,0x19,0x26);
IICA_Write(0x9A,0x1A,0x94);
IICA_Write(0x9A,0x1B,0xC9);
IICA_Write(0x9A,0x00,0x02);
IICA_Write(0x9A,0x44,0x7F);
IICA_Write(0x9A,0x45,0xFF);
IICA_Write(0x9A,0x46,0xFF);
IICA_Write(0x9A,0x47,0xFF);
IICA_Write(0x9A,0x00,0x02);
IICA_Write(0x9A,0x48,0x80);
IICA_Write(0x9A,0x49,0xD3);
IICA_Write(0x9A,0x4A,0xD5);
IICA_Write(0x9A,0x4B,0xE3);
IICA_Write(0x9A,0x00,0x02);
IICA_Write(0x9A,0x4C,0x7F);
IICA_Write(0x9A,0x4D,0x93);
IICA_Write(0x9A,0x4E,0x61);
IICA_Write(0x9A,0x4F,0x37);
IICA_Write(0x9A,0x00,0x02);
IICA_Write(0x9A,0x50,0x7F);
IICA_Write(0x9A,0x51,0x4F);
IICA_Write(0x9A,0x52,0x03);
IICA_Write(0x9A,0x53,0xF2);
IICA_Write(0x9A,0x00,0x02);
IICA_Write(0x9A,0x54,0x80);
IICA_Write(0x9A,0x55,0x26);
IICA_Write(0x9A,0x56,0x94);
IICA_Write(0x9A,0x57,0xC9);
IICA_Write(0x9A,0x00,0x03);
IICA_Write(0x9A,0x1C,0x7F);
IICA_Write(0x9A,0x1D,0xFF);
IICA_Write(0x9A,0x1E,0xFF);
IICA_Write(0x9A,0x1F,0xFF);
IICA_Write(0x9A,0x00,0x03);
IICA_Write(0x9A,0x20,0x80);
IICA_Write(0x9A,0x21,0xD3);
IICA_Write(0x9A,0x22,0xD5);
IICA_Write(0x9A,0x23,0xE3);
IICA_Write(0x9A,0x00,0x03);
IICA_Write(0x9A,0x24,0x7F);
IICA_Write(0x9A,0x25,0x93);
IICA_Write(0x9A,0x26,0x61);
IICA_Write(0x9A,0x27,0x37);
IICA_Write(0x9A,0x00,0x03);
IICA_Write(0x9A,0x28,0x7F);
IICA_Write(0x9A,0x29,0x4F);
IICA_Write(0x9A,0x2A,0x03);
IICA_Write(0x9A,0x2B,0xF2);
IICA_Write(0x9A,0x00,0x03);
IICA_Write(0x9A,0x2C,0x80);
IICA_Write(0x9A,0x2D,0x26);
IICA_Write(0x9A,0x2E,0x94);
IICA_Write(0x9A,0x2F,0xC9);
IICA_Write(0x9A,0x00,0x00);
IICA_Write(0x9A,0x73,0xF0);
IICA_Write(0x9A,0x74,0xF0);
IICA_Write(0x98,0x75,0x60);
IICA_Write(0x9A,0x75,0x60);
}
这是F28335的McBSP的配置，我想实现直接从McBSP发送数据到DMA，DSP不需要发送数据，只需要接收数据，这样配置有什么问题吗？
void InitMcbspaGpio(void)
{
EALLOW;
/* Configure McBSP-A pins using GPIO regs*/
// This specifies which of the possible GPIO pins will be McBSP functional pins.
// Comment out other unwanted lines.
// GpioCtrlRegs.GPAMUX2.bit.GPIO20 = 2; // GPIO20 is MDXA pin
GpioCtrlRegs.GPAMUX2.bit.GPIO21 = 2; // GPIO21 is MDRA pin
// GpioCtrlRegs.GPAMUX2.bit.GPIO22 = 2; // GPIO22 is MCLKXA pin
//GpioCtrlRegs.GPAMUX1.bit.GPIO7 = 2; // GPIO7 is MCLKRA pin (Comment as needed)
GpioCtrlRegs.GPBMUX2.bit.GPIO58 = 1; // GPIO58 is MCLKRA pin (Comment as needed)
// GpioCtrlRegs.GPAMUX2.bit.GPIO23 = 2; // GPIO23 is MFSXA pin
//GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 2; // GPIO5 is MFSRA pin (Comment as needed)
GpioCtrlRegs.GPBMUX2.bit.GPIO59 = 1; // GPIO59 is MFSRA pin (Comment as needed)
/* Enable internal pull-up for the selected pins */
// Pull-ups can be enabled or disabled by the user.
// This will enable the pullups for the specified pins.
// Comment out other unwanted lines.
// GpioCtrlRegs.GPAPUD.bit.GPIO20 = 0; // Enable pull-up on GPIO20 (MDXA)
GpioCtrlRegs.GPAPUD.bit.GPIO21 = 0; // Enable pull-up on GPIO21 (MDRA)
// GpioCtrlRegs.GPAPUD.bit.GPIO22 = 0; // Enable pull-up on GPIO22 (MCLKXA)
//GpioCtrlRegs.GPAPUD.bit.GPIO7 = 0; // Enable pull-up on GPIO7 (MCLKRA) (Comment as needed)
GpioCtrlRegs.GPBPUD.bit.GPIO58 = 0; // Enable pull-up on GPIO58 (MCLKRA) (Comment as needed)
// GpioCtrlRegs.GPAPUD.bit.GPIO23 = 0; // Enable pull-up on GPIO23 (MFSXA)
//GpioCtrlRegs.GPAPUD.bit.GPIO5 = 0; // Enable pull-up on GPIO5 (MFSRA) (Comment as needed)
GpioCtrlRegs.GPBPUD.bit.GPIO59 = 0; // Enable pull-up on GPIO59 (MFSRA) (Comment as needed)
/* Set qualification for selected input pins to asynch only */
// This will select asynch (no qualification) for the selected pins.
// Comment out other unwanted lines.
/*
GpioCtrlRegs.GPAQSEL2.bit.GPIO21 = 3; // Asynch input GPIO21 (MDRA)
// GpioCtrlRegs.GPAQSEL2.bit.GPIO22 = 3; // Asynch input GPIO22 (MCLKXA)
//GpioCtrlRegs.GPAQSEL1.bit.GPIO7 = 3; // Asynch input GPIO7 (MCLKRA) (Comment as needed)
GpioCtrlRegs.GPBQSEL2.bit.GPIO58 = 3; // Asynch input GPIO58(MCLKRA) (Comment as needed)
// GpioCtrlRegs.GPAQSEL2.bit.GPIO23 = 3; // Asynch input GPIO23 (MFSXA)
//GpioCtrlRegs.GPAQSEL1.bit.GPIO5 = 3; // Asynch input GPIO5 (MFSRA) (Comment as needed)
GpioCtrlRegs.GPBQSEL2.bit.GPIO59 = 3; // Asynch input GPIO59 (MFSRA) (Comment as needed)
*/
EDIS;
}
void InitMcbspa(void)
{
// McBSP-A register settings
McbspaRegs.SPCR2.all=0x0000; // Reset FS generator, sample rate generator & transmitter
McbspaRegs.SPCR1.all=0x0000; // Reset Receiver, Right justify word
//新增
McbspaRegs.SPCR2.bit.FREE=1;
McbspaRegs.SPCR2.bit.SOFT=1;
//当在高级语言调试器中遇到断点时，它们决定McBSP的状态。如果FREE = 1，时钟在软件断点上继续运行，数据仍然被移出。当FREE = 1时，软位是一个不关心。
//FREE = 0表示软位生效。当断点发生时，如果SOFT = 0，时钟立即停止，终止传输。如果SOFT = 1，并且在传输过程中出现断点，则继续传输，直到传输完成，然后时钟停止
McbspaRegs.MFFINT.all=0x0000; // Disable all interrupts MCBSP中断不使能是能的原因可能是因为和DMA连接所以没直接接到CPU的PIE级，而是发送XEVT信号到DMA.
McbspaRegs.RCR1.bit.RFRLEN1 = 7; //每帧8个码字，每字32位
McbspaRegs.RCR1.bit.RWDLEN1=5; // 32-bit word
McbspaRegs.RCR2.all=0x0; // Single-phase frame, 1 word/frame, No companding (Receive)
McbspaRegs.RCR1.all=0x0;
// McbspaRegs.PCR.bit.FSXM = 1; // FSX generated internally, FSR derived from an external source
McbspaRegs.PCR.bit.SCLKME = 0;
McbspaRegs.PCR.bit.FSRM = 1;
// McbspaRegs.PCR.bit.CLKXM = 1; // CLKX generated internally, CLKR derived from an external source
McbspaRegs.PCR.bit.CLKRM = 1;
McbspaRegs.SRGR2.bit.CLKSM = 1; // CLKSM=1 (If SCLKME=0, i/p clock to SRG is LSPCLK)
McbspaRegs.SRGR2.bit.FPER = 255; // FPER = 256 CLKG periods
McbspaRegs.SRGR2.bit.FSGM = 1;
McbspaRegs.SRGR1.bit.FWID = 127; // Frame Width = 128 CLKG period
McbspaRegs.SRGR1.bit.CLKGDV = CLKGDV_VAL; // CLKG frequency = LSPCLK/(CLKGDV+1)
delay_loop(); // Wait at least 2 SRG clock cycles
McbspaRegs.SPCR2.bit.GRST=1; // Enable the sample rate generator
clkg_delay_loop(); // Wait at least 2 CLKG cycles
McbspaRegs.SPCR2.bit.XRST=1; // Release TX from Reset
McbspaRegs.SPCR1.bit.RRST=1; // Release RX from Reset
McbspaRegs.SPCR2.bit.FRST=1; // Frame Sync Generator reset
}
这是DMA的代码，这个部分我需要请求各位的帮助，因为我的rdata数组初始化以后，我看程序Debug的时候没有变化。
void init_dma_32()
{
EALLOW;
DmaRegs.DMACTRL.bit.HARDRESET = 1;
asm(" NOP"); // Only 1 NOP needed per Design
// Channel 2, McBSPA Receive
DmaRegs.CH2.BURST_SIZE.all = 1; // 2 words/burst
DmaRegs.CH2.SRC_BURST_STEP = 1; // Increment 1 16-bit addr. btwn words
DmaRegs.CH2.DST_BURST_STEP = 1; // Increment 1 16-bit addr. btwn words
DmaRegs.CH2.TRANSFER_SIZE = 1023; // Interrupt every 512 bursts/transfer
DmaRegs.CH2.SRC_TRANSFER_STEP = 0xFFFF; // Decrement back to DRR2
DmaRegs.CH2.DST_TRANSFER_STEP = 1; // Move to next word in buffer after each word in a burst
DmaRegs.CH2.SRC_ADDR_SHADOW = (Uint32) &McbspaRegs.DRR2.all; // Start address = McBSPA DRR
DmaRegs.CH2.SRC_BEG_ADDR_SHADOW = (Uint32) &McbspaRegs.DRR2.all; // Not needed unless using wrap function
DmaRegs.CH2.DST_ADDR_SHADOW = (Uint32) &rdata[0]; // Start address = Receive buffer (for McBSP-A)
DmaRegs.CH2.DST_BEG_ADDR_SHADOW = (Uint32) &rdata[0]; // Not needed unless using wrap function
DmaRegs.CH2.CONTROL.bit.SYNCCLR = 1; // Clear sync flag
DmaRegs.CH2.CONTROL.bit.ERRCLR = 1; // Clear sync error flag
DmaRegs.CH2.DST_WRAP_SIZE = 0xFFFF; // Put to maximum - don't want destination wrap
DmaRegs.CH2.SRC_WRAP_SIZE = 0xFFFF; // Put to maximum - don't want source wrap
DmaRegs.CH2.MODE.bit.CHINTE = 1; // Enable channel interrupt
//新增
DmaRegs.CH2.MODE.bit.ONESHOT = 1; //连续传送帧信号，直到transfer count =0 .不然只传送一帧。continuous=0,transfer count =0时就停止传送。
DmaRegs.CH2.MODE.bit.CHINTMODE = 1; // Interrupt at end of transfer
DmaRegs.CH2.MODE.bit.PERINTE = 1; // Enable peripheral interrupt event
DmaRegs.CH2.MODE.bit.PERINTSEL = DMA_MREVTA; // Peripheral interrupt select = McBSP MRSYNCA
DmaRegs.CH2.CONTROL.bit.PERINTCLR = 1; // Clear any spurious interrupt flags
EDIS;
}
void start_dma (void)
{
EALLOW;
DmaRegs.CH2.CONTROL.bit.RUN = 1; // Start DMA Receive from McBSP-A
EDIS;
}
