The configuration of registers SHDNZ_CFG[1:0] and DREG_KA_TIME[1:0] is abnormal and does not take effect. During use, when SHDNZ_CFG is configured to 0d, DREG can be immediately power down. However, when configured to 1d and 2d, there is no difference, and the power down starts after about 5ms in both cases. Moreover, when SHDNZ_CFG is configured to 1d or 2d, it has no effect no matter how DREG_KA_TIME is changed, which makes DREG can only be maintained for about 5ms . What may cause this problem? Thank you.
