Part Number: LMK04832
When performing synchronization of multiple LMK04832 devices, I use a cascading method. After synchronizing one LMK04832 individually, I use its output as a SYNC pulse signal, which is connected to the SYNC pins of the other two LMK04832 devices. Once these two LMK04832 devices complete their individual synchronization and receive the SYNC pulse, register 0x0144 changes from 0x00 to 0xFF, and register 0x0139 changes from 0x00 to 0x03. The external reference clock is 100 MHz, and both synchronization and equal-length input adjustments have been performed. However, even after completing the above operations, each time the devices are powered on and the synchronization procedure is carried out, the rising edges of the sysref outputs from the two LMK04832 devices sometimes almost completely coincide, while other times they differ by approximately 200 ps. I have also tried adjusting the analog delay, but to no effect. How should I adjust the setup to ensure that after each power-on and completion of the synchronization procedure, the sysref phase is consistently fixed?
