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LMK00334: 时钟级联风险

Part Number: LMK00334

你好,我的设计需要采用两级PCIE时钟驱动器,选择LMK00334,具体连接为源端芯片---->LMK00334---->连接器---->LMK00334---->终端芯片,源端是X86的CPU,两个终端芯片对PCIE时钟要求分别是RMS jitter最大值0.3ps和1ps,请问:1、针对这种要求,采用LMK00334级联的方式是否能满足要求?2、时钟buffer的级联会对时钟的哪些参数有何种影响?谢谢。