LMX2820: single-PFD模式，只能锁定部分频点，其他全不锁定

lian ales

Part Number: LMX2820

输出频率5.9~7.5G，采用single pfd模式，RFoutA直接输出，RFoutB输出经16分频后得到368.75~468.75M，给AD9912提供参考，再由AD9912产生50M信号，与一个固定500M信号混频到550M信号，送至PFDIN，经内部11分频至50M与OSCIN输入的50M信号鉴相，VCO采用强制模式，如5.9~6.35选择VCO1，6.35~7.3选择VCO2，配置后，仅5900M附近几十M能锁定，其他都不锁定。配置寄存器如下，应该怎么才能锁定其他频点。

mem[0] <=24'h4F001E;

mem[1] <=24'h4E0001;

mem[2] <=24'h4D0608;

mem[3] <=24'h46000E;

mem[4] <=24'h390000;

mem[5] <=24'h38000B;

mem[6] <=24'h240076;

mem[7] <=24'h233000;

mem[8] <=24'h171103;

mem[9] <=24'h166264;

mem[10]<=24'h14272C;

mem[11]<=24'h10171C;

mem[12]<=24'h0F2601;

mem[13]<=24'h0D0058;

mem[14]<=24'h0B0602;

mem[15]<=24'h0281F5;

mem[16]<=24'h006030;

5 个月前

0 Lydia 5 个月前

TI__Mastermind 29705 points

您好，

已经收到了您的案例，调查需要些时间，感谢您的耐心等待。

0 lian ales 4 个月前回复 Lydia

Prodigy 30 points

请问有解决方法没

0 Daniel 4 个月前回复 lian ales

TI__Mastermind 36825 points

您好

Do you have a block diagram?

I do not quite understand the following:

after configuration of 50M signal from internal divide by 11 to 50M to OSCIN input.

0 lian ales 4 个月前回复 Daniel

Prodigy 30 points

The output frequency is 5.9-7.5G, using single pfd mode. RFoutA outputs directly, and RFoutB outputs 368.75-468.75M after 16 frequency division, providing reference for AD9912. AD9912 then generates a signal near 50M signal to tracked the 50M signal input by OSCIN. VCO adopts forced mode, such as selecting VCO1 for 5.9-6.35 and VCO2 for 6.35-7.3. After configuration, only 5900M~5980M can be locked, and other frequency are not locked. How to lock other frequency points by configuring registers 。

I now know how to lock. If I want to lock other frequencies, I need to set the N-frequency divider parameters and calibrate the VCO at the same time. However, if I want to quickly lock, how do I set the registers

0 Daniel 4 个月前回复 lian ales

TI__Mastermind 36825 points

您好

To reduce lock time, we recommend use Instant calibration.

Instant calibration requires a one-time calibration, after that, changing frequency will not do calibration anymore. As such, locking time is much shorter.

Here is the procedure to perform the one-time calibration and the how to change frequency after calibration.

Initialization register setting
1. Set DBLBUF_PLL_EN, DBLBUF_CHDIV_EN, DBLBUF_OUTBUF_EN, DBLBUF_OUTMUX_EN = 1
2. Set DBLR_CAL_EN = 0; INSTCAL_SKIP_ACAL = 0
3. If VCO doubler is required, set INSTCAL_DBLR_EN = 1, otherwise set this bit to 0
4. Set INSTCAL_DLY = T x fosc (in MHz) / 2^CAL_CLK_DIV, where T = 2.5 x CBIASVCO / 0.47µF. CBIASVCO is the bypass capacitor at pin 3
5. Configure other registers to lock to 5.65GHz without any calibration assist
6. Set INSTCAL_PLL_NUM = 2^32 x (PLL_NUM / PLL_DEN)
Programming
7. Vcc power up LMX2820
8. Program all the registers, LMX2820 should lock to 5.65GHz
InstCal calibration
9. Program INSTCAL_EN = 1
9.5 run Index routine
10. Program R0 (with FCAL = 1), calibration will begin
11. Wait 100ms
12. Program R0 (with FCAL = 0) to complete the calibration
13. If LD pin did not turn HIGH, program RESET = 1 to reset LMX2820. After LMX2820 is reset, repeat Step 8 to 12
Changing VCO frequency
14. Program INSTCAL_PLL_NUM, PLL_N, PLL_NUM and PLL_DEN (if their value have change)
15. Program R0 (with FCAL = 0) to change VCO frequency

9.5 Index routine
1. Program R106[10] = 1 (0X6A 0400)
2. Program R107[5:0] = 0 (0x6B 0000)
3. Program R108 = 0 (0x6C 0000)
4. Program R109 = 0 (0x6D 0000)
5. Program R106[9:0] = 514 (0x6A 0602)
6. Program R106[11] = 1 (0x6A 0E02)
7. Program R106[11] = 0 (0x6A 0602)
8. Repeat step 5 to 7 for R106[9:0] = 515 to 519
9. Program R106[10] = 0 (0x6A 0207)

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LMX2820: single-PFD模式，只能锁定部分频点，其他全不锁定