AFE58JD32: The problem of odd-even channel changes in the output data of AFE58JD2 in the ramp mode

Part Number: AFE58JD32

Dear TI experts,

We have encountered a problem while using the AFE58JD32 device.

We are using the JESD204B interface of AFE58JD32 (4 lane mode, F=6, K=3)

We set the AFE58JD32 to the ramp mode. Then, the odd channels and even channels differ by 1, and each channel increases by 2 in sequence.(As shown in the figure below)

However, whenever we power on the device again, if we configure the AFE58JD32 to the ramp mode, we will observe the following situation

After this power-on operation, the value of channels0 is an odd number. On the next power-on, the value of channels0 will be an even number. This means that after powering on, the value of channel 0 could be an odd number or an even number.

How should I go about solving this problem?

thank you

  • 已经收到了您的案例,调查需要些时间,感谢您的耐心等待。

  • 好的,谢谢TI的专家。

    因为我们使用的AFE58JD32芯片是一个ADC分时复用 采集转换两个模拟通道的数据(这里就涉及到了奇偶采样的时刻),当我们给AFE58JD32的IN1输入正弦波测试信号的时候,经过FPGA解析后,这次上电后,正弦波波形在通道0,下一次上电后,正弦波波形就在通道1,这是随机的。我们想让通道关系固定下来。

    如下图所示

    我们给IN1输入正弦波测试信号,某次上电后,正弦波出现在通道0

    我们给IN1输入正弦波测试信号,某次上电后,正弦波出现在通道1

    这就是我们遇到的情况(我怀疑是奇偶采样时刻没有确定导致的?)

    此外,我们从AFE58JD32数据手册查到了TX_TRIG这个信号:TX_TRIG信号提供了一种机制来确定相对于系统时钟的奇偶输入信号的采样瞬间

    我们尝试使用TX_TRIG信号,但是在运行的时候,没有发现解析后的奇偶通道发生交换。

    期待TI专家的回复!